MI02～MI06：GNDにショート
JP2, JP6：ショート
J18：VADJ SELECT：1V8
NET "axi_gpio_0_GPIO_IO_pin" LOC = T18;
NET "axi_gpio_0_GPIO_IO_pin" IOSTANDARD = LVCMOS25;
NET "processing_system7_0_GPIO_pin" LOC = R18;
NET "processing_system7_0_GPIO_pin" IOSTANDARD = LVCMOS25;
NET "LED8bit[7]" IOSTANDARD = LVCMOS33;
NET "LED8bit[6]" IOSTANDARD = LVCMOS33;
NET "LED8bit[5]" IOSTANDARD = LVCMOS33;
NET "LED8bit[4]" IOSTANDARD = LVCMOS33;
NET "LED8bit[3]" IOSTANDARD = LVCMOS33;
NET "LED8bit[2]" IOSTANDARD = LVCMOS33;
NET "LED8bit[1]" IOSTANDARD = LVCMOS33;
NET "LED8bit[0]" IOSTANDARD = LVCMOS33;
NET "LED8bit[0]" LOC = T22;
NET "LED8bit[1]" LOC = T21;
NET "LED8bit[2]" LOC = U22;
NET "LED8bit[3]" LOC = U21;
NET "LED8bit[4]" LOC = V22;
NET "LED8bit[5]" LOC = W22;
NET "LED8bit[6]" LOC = U19;
NET "LED8bit[7]" LOC = U14;
-----------------------------------------------------------------------------
--
-- AXI Lite Slave
--
-- led8_axi_lite_slave
--
-- LED 8bitを制御する
-----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
--library unisim;
--use unisim.vcomponents.all;
entity led8_axi_lite_slave is
generic (
C_S_AXI_ADDR_WIDTH : integer := 32;
C_S_AXI_DATA_WIDTH : integer := 32
);
port(
-- System Signals
ACLK : in std_logic;
ARESETN : in std_logic;
-- Slave Interface Write Address Ports
S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
S_AXI_AWPROT : in std_logic_vector(3-1 downto 0);
S_AXI_AWVALID : in std_logic;
S_AXI_AWREADY : out std_logic;
-- Slave Interface Write Data Ports
S_AXI_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
S_AXI_WSTRB : in std_logic_vector(C_S_AXI_DATA_WIDTH/8-1 downto 0);
S_AXI_WVALID : in std_logic;
S_AXI_WREADY : out std_logic;
-- Slave Interface Write Response Ports
S_AXI_BRESP : out std_logic_vector(2-1 downto 0);
S_AXI_BVALID : out std_logic;
S_AXI_BREADY : in std_logic;
-- Slave Interface Read Address Ports
S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
S_AXI_ARPROT : in std_logic_vector(3-1 downto 0);
S_AXI_ARVALID : in std_logic;
S_AXI_ARREADY : out std_logic;
-- Slave Interface Read Data Ports
S_AXI_RDATA : out std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
S_AXI_RRESP : out std_logic_vector(2-1 downto 0);
S_AXI_RVALID : out std_logic;
S_AXI_RREADY : in std_logic;
-- User Signals
LED8bit : out std_logic_vector(7 downto 0)
);
end led8_axi_lite_slave;
architecture implementation of led8_axi_lite_slave is
-- RESP の値の定義
constant RESP_OKAY : std_logic_vector := "00";
constant RESP_EXOKAY : std_logic_vector := "01";
constant RESP_SLVERR : std_logic_vector := "10";
constant RESP_DECERR : std_logic_vector := "11";
-- Write Transaction State Machine
type WRITE_TRAN_SM is (IDLE_WR, DATA_WIRTE_HOLD, BREADY_ASSERT);
signal wrt_cs : WRITE_TRAN_SM;
-- Read Transaction State Machine
type READ_TRAN_SM is (IDLE_RD, RDATA_WAIT);
signal rdt_cs : READ_TRAN_SM;
-- Registers
signal Commannd_Register : std_logic_vector(31 downto 0);
signal Counter_Load_Register : std_logic_vector(31 downto 0);
signal LED_Interval_Resgister : std_logic_vector(31 downto 0);
-- Counters
signal LED_Display_Counter : std_logic_vector(7 downto 0);
signal LED_Interval_Counter : std_logic_vector(31 downto 0);
signal awready : std_logic := '1';
signal bvalid : std_logic := '0';
signal arready : std_logic := '1';
signal rvalid : std_logic := '0';
signal rdata : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);
signal awaddr_hold : std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);
signal wready : std_logic;
begin
---- Write Transaction
-- AXI4 Lite Slave Write Transaction State Machine (Address, Response)
proc_Write_Tran_SM : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN = '0' then
wrt_cs <= IDLE_WR;
awready <= '1';
bvalid <= '0';
awaddr_hold <= (others => '0');
wready <= '0';
else
case wrt_cs is
when IDLE_WR =>
if S_AXI_AWVALID = '1' then -- Write Transaction Start
wrt_cs <= DATA_WIRTE_HOLD;
awready <= '0';
awaddr_hold <= S_AXI_AWADDR;
wready <= '1';
end if;
when DATA_WIRTE_HOLD =>
if S_AXI_WVALID = '1' then -- Write data just valid
wrt_cs <= BREADY_ASSERT;
bvalid <= '1';
wready <= '0';
end if;
when BREADY_ASSERT =>
if S_AXI_BREADY = '1' then -- The write transaction was terminated.
wrt_cs <= IDLE_WR;
bvalid <= '0';
awready <= '1';
end if;
end case;
end if;
end if;
end process proc_Write_Tran_SM;
S_AXI_AWREADY <= awready;
S_AXI_BVALID <= bvalid;
S_AXI_BRESP <= RESP_OKAY;
S_AXI_WREADY <= wready;
---- Read Transaction
-- AXI4 Lite Slave Read Transaction State Machine
proc_Read_Tran_SM : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN = '0' then
rdt_cs <= IDLE_RD;
arready <= '1';
rvalid <= '0';
else
case rdt_cs is
when IDLE_RD =>
if S_AXI_ARVALID = '1' then
rdt_cs <= RDATA_WAIT;
arready <= '0';
rvalid <= '1';
end if;
when RDATA_WAIT =>
if S_AXI_RREADY = '1' then
rdt_cs <= IDLE_RD;
arready <= '1';
rvalid <= '0';
end if;
end case;
end if;
end if;
end process proc_Read_Tran_SM;
S_AXI_ARREADY <= arready;
S_AXI_RVALID <= rvalid;
S_AXI_RRESP <= RESP_OKAY;
-- S_AXI_RDATA
proc_RDATA : process (ACLK) begin
if ARESETN = '0' then
rdata <= (others => '0');
elsif S_AXI_ARVALID = '1' then
case S_AXI_ARADDR(3 downto 0) is
when x"0" => rdata <= Commannd_Register;
when x"4" => rdata <= Counter_Load_Register;
when x"8" => rdata(31 downto 8) <= x"000000";
rdata(7 downto 0) <= LED_Display_Counter;
when x"c" => rdata <= LED_Interval_Resgister;
when others =>
end case;
end if;
end process proc_RDATA;
S_AXI_RDATA <= rdata;
---- Registeres
-- Commannd_Register
-- オフセット0：Command Register（R/W）
-- ビット0：1 - LEDの値を＋1する 0 - LEDの値はそのまま （デフォルト値は0）
-- ビット31〜1：リザーブ
proc_Commannd_Register : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN = '0' then
Commannd_Register <= (others => '0');
else
if S_AXI_WVALID='1' and wready='1' and awaddr_hold(3 downto 0)=x"0" then
Commannd_Register(0) <= S_AXI_WDATA(0);
end if;
end if;
end if;
end process proc_Commannd_Register;
-- Counter_Load_Register
-- オフセット4：LED Counter Load Register（R/W）
-- ビット7〜0：8ビット分のLEDの値
-- ビット31〜8：リザーブ（Read時はすべて0）
proc_Counter_Load_Register : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN = '0' then
Counter_Load_Register <= (others => '0');
else
if S_AXI_WVALID='1' and wready='1' and awaddr_hold(3 downto 0)=x"4" then
Counter_Load_Register(7 downto 0) <= S_AXI_WDATA(7 downto 0);
end if;
end if;
end if;
end process proc_Counter_Load_Register;
-- LED_Interval_Resgister
-- オフセットC：LED Interval Register（R/W）但し、動作クロックは100MHzとする
-- ビット31〜0：LED値を＋1する時のカウント値
proc_LED_Interval_Resgister : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN = '0' then
LED_Interval_Resgister <= (others => '0');
else
if S_AXI_WVALID='1' and wready='1' and awaddr_hold(3 downto 0)=x"C" then
LED_Interval_Resgister <= S_AXI_WDATA;
end if;
end if;
end if;
end process proc_LED_Interval_Resgister;
---- Conteres
-- LED_Display_Counter
proc_LED_Display_Counter : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN='0' then
LED_Display_Counter <= (others => '0');
else
if S_AXI_WVALID='1' and wready='1' and awaddr_hold(3 downto 0)=x"4" then -- Counter Load
LED_Display_Counter <= S_AXI_WDATA(7 downto 0);
elsif Commannd_Register(0) = '1' then -- Enable
if LED_Interval_Counter = x"00000000" then
LED_Display_Counter <= std_logic_vector(unsigned(LED_Display_Counter) + 1);
end if;
end if;
end if;
end if;
end process proc_LED_Display_Counter;
LED8bit <= LED_Display_Counter;
-- LED_Interval_Counter
proc_LED_Interval_Counter : process (ACLK) begin
if ACLK'event and ACLK='1' then
if ARESETN='0' then
LED_Interval_Counter <= (others => '0');
else
if Commannd_Register(0) = '1' then -- Enable
if LED_Interval_Counter = x"00000000" then
LED_Interval_Counter <= LED_Interval_Resgister;
else
LED_Interval_Counter <= std_logic_vector(unsigned(LED_Interval_Counter) - 1);
end if;
else
LED_Interval_Counter <= LED_Interval_Resgister;
end if;
end if;
end if;
end process proc_LED_Interval_Counter;
end implementation;
/* * led8_axi_lite_slave.c * * Created on: 2013/12/16 * Author: Masaaki */
#include <stdio.h>
#include "xil_types.h"
#include "xtmrctr.h"
#include "xparameters.h"
#include "xil_io.h"
#include "xil_exception.h"
#include "xscugic.h"
#define LED8_AXILS_BASEADDR XPAR_LED8_AXI_LITE_SLAVE_0_S_AXI_RNG00_BASEADDR
extern char inbyte(void);
int main() {
int inbyte_in;
int val;
char str[80];
while(1){
print("********************** LED8 TEST Start ***********************\n\r");
print("TeraTerm: Please Set Local Echo Mode.\n\r");
print("Press '1' to show all registers\n\r");
print("Press '2' to set LED8 Enable or Disable(Toggle, Command Register)\n\r");
print("Press '3' to set LED Counter Load Register (8bits, Please input hexadecimal)\n\r");
print("Press '4' to set LED Interval Register (32bits, Please input decimal)\n\r");
print("Press '5' to exit\n\r");
print("Selection : ");
inbyte_in = inbyte();
print(" \r\n");
print(" \r\n");
switch(inbyte_in) {
case '1' : // Show all registers
val = (int)Xil_In32((u32)LED8_AXILS_BASEADDR);
printf("Command Register is %x\r\n", val);
val = (int)Xil_In32((u32)(LED8_AXILS_BASEADDR+4));
printf("LED Counter Load Register is %x\r\n", val);
val = (int)Xil_In32((u32)(LED8_AXILS_BASEADDR+8));
printf("LED Monitor Register is %x\r\n", val);
val = (int)Xil_In32((u32)(LED8_AXILS_BASEADDR+0xc));
printf("LED Interval Register is %d (decimal)\r\n", val);
break;
case '2' : // Set LED8 Enable or Disable(Toggle, Command Register)
val = (int)Xil_In32((u32)LED8_AXILS_BASEADDR);
if (val & 1) {
Xil_Out32((u32)LED8_AXILS_BASEADDR, (u32)0);
print("LED8 count is Disable\n\r");
} else {
Xil_Out32((u32)LED8_AXILS_BASEADDR, (u32)1);
print("LED8 count is Enable\n\r");
}
break;
case '3' : // Set LED Counter Load Register (8bits, Please input hexadecimal)
print("Please input LED Counter Load Register value (hexadecimal)");
scanf("%x", &val);
Xil_Out32((u32)(LED8_AXILS_BASEADDR+4), (u32)val);
print(" \r\n");
break;
case '4' : // Set LED Interval Register (32bits, Please input hexadecimal)
print("Please input LED Interval Load Register value (decimal) ");
scanf("%d", &val);
Xil_Out32((u32)(LED8_AXILS_BASEADDR+0xc), (u32)val);
print(" \r\n");
break;
case '5' : // exit
print("exit\r\n");
return 0;
}
print(" \r\n");
}
}
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|---|---|---|---|---|---|---|
| - | - | - | - | - | 1 | 2 |
| 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 17 | 18 | 19 | 20 | 21 | 22 | 23 |
| 24 | 25 | 26 | 27 | 28 | 29 | 30 |
| 31 | - | - | - | - | - | - |