libdc1394 error: Failed to initialize libdc1394
...0 pairs have been successfully detected.
Error: too little pairs to run the calibration
#!/bin/sh
for file in *.bmp
do
convert -geometry 640x480 -depth 8 -type GrayScale $file ${file%bmp}jpg
done
// -l : left bmp file name
// -r : right bmp file name
// -n : Start File Number
// -h : help
//
// RL_capture_bmp.cpp
// 2016/02/24
// 2016/03/22 : -n : Start File Number
//
// This software converts the left and right of the camera image to BMP file.
// -l : left bmp file name
// -r : right bmp file name
// -n : Start File Number
// -h : help
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <string.h>
#include "bmpheader.h"
#define PIXEL_NUM_OF_BYTES 4
#define NUMBER_OF_WRITE_FRAMES 3 // Note: If not at least 3 or more, the image is not displayed in succession.
#define XGA_HORIZONTAL_PIXELS 1024
#define XGA_VERTICAL_LINES 768
#define XGA_ALL_DISP_ADDRESS (XGA_HORIZONTAL_PIXELS * XGA_VERTICAL_LINES * PIXEL_NUM_OF_BYTES)
#define XGA_3_PICTURES (XGA_ALL_DISP_ADDRESS * NUMBER_OF_WRITE_FRAMES)
#define SVGA_HORIZONTAL_PIXELS 800
#define SVGA_VERTICAL_LINES 600
#define SVGA_ALL_DISP_ADDRESS (SVGA_HORIZONTAL_PIXELS * SVGA_VERTICAL_LINES * PIXEL_NUM_OF_BYTES)
#define SVGA_3_PICTURES (SVGA_ALL_DISP_ADDRESS * NUMBER_OF_WRITE_FRAMES)
int WriteBMPfile(FILE *fbmp, volatile unsigned int *frame_buffer, BMP24FORMAT **bmp_data);
int main(int argc, char *argv[]){
int opt;
int c, help_flag=0;
char left_bmp_fn[256] = "left";
char right_bmp_fn[256] = "right";
unsigned char attr[1024];
unsigned long phys_addr;
volatile unsigned int *Leye_addr, *Reye_addr;
int i, j;
int file_no = 0;
FILE *fbmp;
BMP24FORMAT **bmp_data; // 24 bits Date of BMP files (SVGA_HORIZONTAL_PIXELS * SVGA_VERTICAL_LINES)
while ((opt=getopt(argc, argv, "l:r:n:h")) != -1){
switch (opt){
case 'l':
strcpy(left_bmp_fn, optarg);
break;
case 'r':
strcpy(right_bmp_fn, optarg);
break;
case 'n':
file_no = atoi(optarg);
break;
case 'h':
help_flag = 1;
break;
}
}
if (help_flag == 1){ // help
printf("Usage : RL_capture_bmp [-l <left bmp file name>] [-r <right bmp file name>] [-n <Start File Number>] [-h]\n");
}
// udmabuf0
int fdf = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fdf == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
volatile unsigned *frame_buffer = (volatile unsigned *)mmap(NULL, SVGA_3_PICTURES+XGA_3_PICTURES+SVGA_ALL_DISP_ADDRESS, PROT_READ|PROT_WRITE, MAP_SHARED, fdf, 0);
if (!frame_buffer){
fprintf(stderr, "frame_buffer mmap error\n");
exit(-1);
}
// phys_addr of udmabuf0
int fdp = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fdp == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fdp, attr, 1024);
sscanf((const char *)attr, "%lx", &phys_addr);
close(fdp);
printf("phys_addr = %x\n", (unsigned int)phys_addr);
// allocated the memory for bmp file
if ((bmp_data=(BMP24FORMAT **)malloc(sizeof(BMP24FORMAT *)*SVGA_VERTICAL_LINES)) == NULL){
fprintf(stderr, "Can not allocate memory of the first dimension of SVGA_VERTICAL_LINES of bmp_data\n");
exit(1);
}
for (i=0; i<SVGA_VERTICAL_LINES; i++){
if ((bmp_data[i]=(BMP24FORMAT *)malloc(sizeof(BMP24FORMAT) * SVGA_HORIZONTAL_PIXELS)) == NULL){
fprintf(stderr, "Can not allocate %d th memory of the first dimension of bmp_data\n", i);
exit(1);
}
}
// assigned the left and right eys's frame buffer
Leye_addr = frame_buffer; // The Left Camera Image
Reye_addr = (volatile unsigned int *)((unsigned)frame_buffer+SVGA_3_PICTURES+0x8); // The Right Camera Image
char lbmp_file[256];
char rbmp_file[256];
// w - writed the left and right eye's bmp files. q - exit.
c = getc(stdin);
while(c != 'q'){
switch ((char)c) {
case 'w' : // w - writed the left and right eye's bmp files.
// writed the left and right eys's frame buffer
sprintf(lbmp_file, "left%d.bmp", file_no);
if ((fbmp=fopen(lbmp_file, "wb")) == NULL){
fprintf(stderr, "Cannot open %s in binary mode\n", lbmp_file);
exit(1);
}
WriteBMPfile(fbmp, Leye_addr, bmp_data);
fclose(fbmp);
sprintf(rbmp_file, "right%d.bmp", file_no);
if ((fbmp=fopen(rbmp_file, "wb")) == NULL){
fprintf(stderr, "Cannot open %s in binary mode\n", rbmp_file);
exit(1);
}
WriteBMPfile(fbmp, Reye_addr, bmp_data);
fclose(fbmp);
printf("file No. = %d\n", file_no);
file_no++;
break;
}
c = getc(stdin);
}
for(i=0; i<SVGA_VERTICAL_LINES; i++){
free(bmp_data[i]);
}
free(bmp_data);
munmap((void *)frame_buffer, (SVGA_3_PICTURES+XGA_3_PICTURES+SVGA_ALL_DISP_ADDRESS));
close(fdf);
return(0);
}
int WriteBMPfile(FILE *fbmp, volatile unsigned *frame_buffer, BMP24FORMAT **bmp_data){
BITMAPFILEHEADER bmpfh; // file header for a bmp file
BITMAPINFOHEADER bmpih; // INFO header for BMP file
// Copy the camera color data of the bmp_data (data of BMP when its starts from lower left)
for (int i=0; i<SVGA_VERTICAL_LINES; i++){
for (int j=0; j<SVGA_HORIZONTAL_PIXELS; j++){
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].red = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j]>>16)&0xff;
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].green = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j]>>8)&0xff;
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].blue = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j])&0xff;
}
}
// Assign a value to the file header of the BMP file
bmpfh.bfType = 0x4d42;
bmpfh.bfSize = SVGA_HORIZONTAL_PIXELS*SVGA_VERTICAL_LINES*3+54;
bmpfh.bfReserved1 = 0;
bmpfh.bfReserved2 = 0;
bmpfh.bfOffBits = 0x36;
// Assign a value to the INFO header of the BMP file
bmpih.biSize = 0x28;
bmpih.biWidth = SVGA_HORIZONTAL_PIXELS;
bmpih.biHeight = SVGA_VERTICAL_LINES;
bmpih.biPlanes = 0x1;
bmpih.biBitCount = 24;
bmpih.biCompression = 0;
bmpih.biSizeImage = 0;
bmpih.biXPixPerMeter = 3779;
bmpih.biYPixPerMeter = 3779;
bmpih.biClrUsed = 0;
bmpih.biClrImporant = 0;
// Writing of BMP file header
fwrite(&bmpfh.bfType, sizeof(char), 2, fbmp);
fwrite(&bmpfh.bfSize, sizeof(long), 1, fbmp);
fwrite(&bmpfh.bfReserved1, sizeof(short), 1, fbmp);
fwrite(&bmpfh.bfReserved2, sizeof(short), 1, fbmp);
fwrite(&bmpfh.bfOffBits, sizeof(long), 1, fbmp);
// Writing of BMP INFO header
fwrite(&bmpih, sizeof(BITMAPINFOHEADER), 1, fbmp);
// Writing of lbmp_data anr rbmp_data
for (int i=0; i<SVGA_VERTICAL_LINES; i++) {
for (int j=0; j<SVGA_HORIZONTAL_PIXELS; j++) {
fputc((int)bmp_data[i][j].blue, fbmp);
fputc((int)bmp_data[i][j].green, fbmp);
fputc((int)bmp_data[i][j].red, fbmp);
}
}
}
// mt9d111_axi_lite_slave.v
// mt9d111_inf_axi_master のAXI Lite Slave モジュール。Frame Buffer のスタートアドレス・レジスタを持つ。
//
// 2014/11/08 : one_shot_reg を実装。
// オフセット0番地： フレーム・バッファの先頭アドレス(fb_start_address)
// オフセット4番地： 0 ビット目が 0 の時動画、0 ビット目に 1 の時に、ワンショットで取得した1フレームのカメラ画像を表示(one_shot_reg)
// 1 ビット目に 1 を Write した時に、ワンショットで1フレームの画像をフレーム・バッファに保存
//
// StereoCam_Alt_Disp.c
// 2016/02/01 by marsee
//
// 2016/02/17 : 's' commannd : Camera Start and Stop Command, but left camera only.
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#define PIXEL_NUM_OF_BYTES 4
#define NUMBER_OF_WRITE_FRAMES 3 // Note: If not at least 3 or more, the image is not displayed in succession.
#define XGA_HORIZONTAL_PIXELS 1024
#define XGA_VERTICAL_LINES 768
#define XGA_ALL_DISP_ADDRESS (XGA_HORIZONTAL_PIXELS*XGA_VERTICAL_LINES*PIXEL_NUM_OF_BYTES)
#define SVGA_HORIZONTAL_PIXELS 800
#define SVGA_VERTICAL_LINES 600
#define SVGA_ALL_DISP_ADDRESS (SVGA_HORIZONTAL_PIXELS*SVGA_VERTICAL_LINES*PIXEL_NUM_OF_BYTES)
void cam_i2c_init(volatile unsigned *caminf_axi_iic) {
caminf_axi_iic[64] = 0x2; // reset tx fifo ,address is 0x100, i2c_control_reg
caminf_axi_iic[64] = 0x1; // enable i2c
}
void cam_i2x_write_sync(void) {
// unsigned c;
// c = *cam_i2c_rx_fifo;
// while ((c & 0x84) != 0x80)
// c = *cam_i2c_rx_fifo; // No Bus Busy and TX_FIFO_Empty = 1
usleep(1000);
}
void cam_i2c_write(volatile unsigned *caminf_axi_iic, unsigned int device_addr, unsigned int write_addr, unsigned int write_data){
caminf_axi_iic[66] = 0x100 | (device_addr & 0xfe); // Slave IIC Write Address, address is 0x108, i2c_tx_fifo
caminf_axi_iic[66] = write_addr;
caminf_axi_iic[66] = (write_data >> 8)|0xff; // first data
caminf_axi_iic[66] = 0x200 | (write_data & 0xff); // second data
cam_i2x_write_sync();
}
int main()
{
int fd0, fd1, fd2, fd3, fd4, fd5, fd6, fd7, fd9, fd10;
volatile unsigned *bmdc_axi_lites0;
volatile unsigned *caminf_axi_vdma_0, *dviin_axi_vdma_0;
volatile unsigned *caminf_axis_switch_0, *caminf_axis_switch_1;
volatile unsigned *caminf_mt9d111_inf_axis_0;
volatile unsigned *caminf_axi_iic;
volatile unsigned *caminf_lap_filter_axis_0;
volatile unsigned *frame_buffer;
unsigned char attr[1024];
unsigned long phys_addr;
char c;
int laps_cntrl;
// Bitmap Display Controller 0 AXI4 Lite Slave (UIO6)
fd6 = open("/dev/uio6", O_RDWR); // bitmap_display_controller 0 axi4 lite
if (fd6 < 1){
fprintf(stderr, "/dev/uio6 (bitmap_disp_cntrler_axi_master_0) open errorn");
exit(-1);
}
bmdc_axi_lites0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd6, 0);
if (!bmdc_axi_lites0){
fprintf(stderr, "bmdc_axi_lites0 mmap errorn");
exit(-1);
}
// caminf_axi_vdma_0 (UIO1)
fd1 = open("/dev/uio1", O_RDWR); // caminf_axi_vdma_0 interface AXI4 Lite Slave
if (fd1 < 1){
fprintf(stderr, "/dev/uio1 (caminf_axi_vdma_0) open errorn");
exit(-1);
}
caminf_axi_vdma_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!caminf_axi_vdma_0){
fprintf(stderr, "caminf_axi_vdma_0 mmap errorn");
exit(-1);
}
// dviin_axi_vdma_0 (UIO7)
fd7 = open("/dev/uio7", O_RDWR); // dviin_axi_vdma_0 interface AXI4 Lite Slave
if (fd7 < 1){
fprintf(stderr, "/dev/uio7 (dviin_axi_vdma_0) open errorn");
exit(-1);
}
dviin_axi_vdma_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd7, 0);
if (!dviin_axi_vdma_0){
fprintf(stderr, "dviin_axi_vdma_0 mmap errorn");
exit(-1);
}
// mt9d111 i2c AXI4 Lite Slave (UIO0)
fd0 = open("/dev/uio0", O_RDWR); // mt9d111 i2c AXI4 Lite Slave
if (fd0 < 1){
fprintf(stderr, "/dev/uio0 (caminf_axi_iic) open errorn");
exit(-1);
}
caminf_axi_iic = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd0, 0);
if (!caminf_axi_iic){
fprintf(stderr, "caminf_axi_iic mmap errorn");
exit(-1);
}
// mt9d111 inf axis AXI4 Lite Slave (UIO5)
fd5 = open("/dev/uio5", O_RDWR); // mt9d111 inf axis AXI4 Lite Slave
if (fd5 < 1){
fprintf(stderr, "/dev/uio5 (caminf_mt9d111_inf_axis_0) open errorn");
exit(-1);
}
caminf_mt9d111_inf_axis_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd5, 0);
if (!caminf_mt9d111_inf_axis_0){
fprintf(stderr, "caminf_mt9d111_inf_axis_0 mmap errorn");
exit(-1);
}
// caminf_axis_switch_0 (UIO2)
fd2 = open("/dev/uio2", O_RDWR); // caminf_axis_switch_0 interface AXI4 Lite Slave
if (fd2 < 1){
fprintf(stderr, "/dev/uio2 (caminf_axis_switch_0) open errorn");
exit(-1);
}
caminf_axis_switch_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd2, 0);
if (!caminf_axis_switch_0){
fprintf(stderr, "caminf_axis_switch_0 mmap errorn");
exit(-1);
}
// caminf_axis_switch_1 (UIO3)
fd3 = open("/dev/uio3", O_RDWR); // caminf_axis_switch_1 interface AXI4 Lite Slave
if (fd3 < 1){
fprintf(stderr, "/dev/uio3 (caminf_axis_switch_1) open errorn");
exit(-1);
}
caminf_axis_switch_1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd3, 0);
if (!caminf_axis_switch_1){
fprintf(stderr, "caminf_axis_switch_1 mmap errorn");
exit(-1);
}
// caminf_lap_filter_axis_0 (UIO4)
fd4 = open("/dev/uio4", O_RDWR); // caminf_lap_filter_axis_0 interface AXI4 Lite Slave
if (fd4 < 1){
fprintf(stderr, "/dev/uio4 (caminf_lap_filter_axis_0) open errorn");
exit(-1);
}
caminf_lap_filter_axis_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd4, 0);
if (!caminf_lap_filter_axis_0){
fprintf(stderr, "caminf_lap_filter_axis_0 mmap errorn");
exit(-1);
}
// udmabuf0
fd9 = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fd9 == -1){
fprintf(stderr, "/dev/udmabuf0 open errorn");
exit(-1);
}
frame_buffer = (volatile unsigned *)mmap(NULL, (XGA_ALL_DISP_ADDRESS*NUMBER_OF_WRITE_FRAMES)+(SVGA_ALL_DISP_ADDRESS*NUMBER_OF_WRITE_FRAMES), PROT_READ|PROT_WRITE, MAP_SHARED, fd9, 0);
if (!frame_buffer){
fprintf(stderr, "frame_buffer mmap errorn");
exit(-1);
}
// caminf_axis_switch_1, 1to2 ,Select M00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_1[16] = 0x0; // 0x40 = 0
caminf_axis_switch_1[17] = 0x80000000; // 0x44 = 0x80000000, disable
caminf_axis_switch_1[0] = 0x2; // Comit registers
// caminf_axis_switch_0, 2to1, Select S00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_0[16] = 0x0; // 0x40 = 0;
caminf_axis_switch_0[0] = 0x2; // Comit registers
// phys_addr of udmabuf0
fd10 = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd10 == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open errorn");
exit(-1);
}
read(fd10, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd10);
printf("phys_addr = %xn", (unsigned)phys_addr);
// AXI VDMA Initialization sequence (caminf_axi_vdma_0)
caminf_axi_vdma_0[12] = 0x4; // S2MM_VDMACR (S2MM VDMA Control Register Offset 30h) is 0x4
while ((caminf_axi_vdma_0[12] & 0x4) == 0x4) ; // Reset is progress
caminf_axi_vdma_0[12] = 0x4; // S2MM_VDMACR (S2MM VDMA Control Register Offset 30h) is 0x4
while ((caminf_axi_vdma_0[12] & 0x4) == 0x4) ; // Reset is progress
caminf_axi_vdma_0[18] = NUMBER_OF_WRITE_FRAMES; // S2MM_FRMSTORE (0x48) register
caminf_axi_vdma_0[12] = 0x00010002; // S2MM_VDMACR(IRQFrameCount = 0x1, Circular_Park = 1)
caminf_axi_vdma_0[41] = SVGA_HORIZONTAL_PIXELS*PIXEL_NUM_OF_BYTES; // S2MM Horizontal Size Register（S2MM_HSIZE）0xc80 = 3200dec = 800 x 4
caminf_axi_vdma_0[42] = SVGA_HORIZONTAL_PIXELS*PIXEL_NUM_OF_BYTES; // S2MM Frame Delay and Stride Register（S2MM_FRMDLY_STRIDE）0xc80 = 3200dec = 800 x 4
caminf_axi_vdma_0[43] = (unsigned)phys_addr; // S2MM Start Address (1 to 16) Start Address 1
caminf_axi_vdma_0[44] = (unsigned)phys_addr+SVGA_ALL_DISP_ADDRESS; // S2MM Start Address (1 to 16) Start Address 2
caminf_axi_vdma_0[45] = (unsigned)phys_addr+2*SVGA_ALL_DISP_ADDRESS; // S2MM Start Address (1 to 16) Start Address 3
caminf_axi_vdma_0[12] = 0x00010003; // S2MM_VDMACR(IRQFrameCount = 0x1, Circular_Park = 1, Run/stop = 1)
while((caminf_axi_vdma_0[13] & 0x1) == 0x1) ; // Halt? (S2MM_VDMASR 0x34)
caminf_axi_vdma_0[40] = SVGA_VERTICAL_LINES; // S2MM Vertical Size (S2MM_VSIZE Offset 0xA0) 0x258 = 600dec
// AXI VDMA Initialization sequence (dviin_axi_vdma_0)
dviin_axi_vdma_0[12] = 0x4; // S2MM_VDMACR (S2MM VDMA Control Register Offset 30h) is 0x4
while ((dviin_axi_vdma_0[12] & 0x4) == 0x4) ; // Reset is progress
dviin_axi_vdma_0[12] = 0x4; // S2MM_VDMACR (S2MM VDMA Control Register Offset 30h) is 0x4
while ((dviin_axi_vdma_0[12] & 0x4) == 0x4) ; // Reset is progress
dviin_axi_vdma_0[18] = NUMBER_OF_WRITE_FRAMES; // S2MM_FRMSTORE (0x48) register
dviin_axi_vdma_0[12] = 0x00010002; // S2MM_VDMACR(IRQFrameCount = 0x1, Circular_Park = 1)
dviin_axi_vdma_0[41] = XGA_HORIZONTAL_PIXELS*PIXEL_NUM_OF_BYTES; // S2MM Horizontal Size Register（S2MM_HSIZE）0xc80 = 3200dec = 800 x 4
dviin_axi_vdma_0[42] = XGA_HORIZONTAL_PIXELS*PIXEL_NUM_OF_BYTES; // S2MM Frame Delay and Stride Register（S2MM_FRMDLY_STRIDE）0xc80 = 3200dec = 800 x 4
dviin_axi_vdma_0[43] = (unsigned)phys_addr+3*SVGA_ALL_DISP_ADDRESS; // S2MM Start Address (1 to 16) Start Address 1
dviin_axi_vdma_0[44] = (unsigned)phys_addr+3*SVGA_ALL_DISP_ADDRESS+XGA_ALL_DISP_ADDRESS; // S2MM Start Address (1 to 16) Start Address 2
dviin_axi_vdma_0[45] = (unsigned)phys_addr+3*SVGA_ALL_DISP_ADDRESS+2*XGA_ALL_DISP_ADDRESS; // S2MM Start Address (1 to 16) Start Address 3
dviin_axi_vdma_0[12] = 0x00010003; // S2MM_VDMACR(IRQFrameCount = 0x1, Circular_Park = 1, Run/stop = 1)
while((dviin_axi_vdma_0[13] & 0x1) == 0x1) ; // Halt? (S2MM_VDMASR 0x34)
dviin_axi_vdma_0[40] = XGA_VERTICAL_LINES; // S2MM Vertical Size (S2MM_VSIZE Offset 0xA0) 0x258 = 600dec
// CMOS Camera initialize, MT9D111
cam_i2c_init(caminf_axi_iic);
cam_i2c_write(caminf_axi_iic, 0xba, 0xf0, 0x1); // Changed regster map to IFP page 1
cam_i2c_write(caminf_axi_iic, 0xba, 0x97, 0x20); // RGB Mode, RGB565
caminf_mt9d111_inf_axis_0[1] = 0;
// Camera Base Address Setting
caminf_mt9d111_inf_axis_0[0] = (unsigned)phys_addr+3*SVGA_ALL_DISP_ADDRESS;; // Camera Interface start (Address is dummy)
// bitmap display controller settings
bmdc_axi_lites0[0] = (unsigned)phys_addr; // Bitmap Display Controller 0 start, My Camera Image
c = getc(stdin);
while(c != 'q'){
switch ((char)c) {
case '1' :
bmdc_axi_lites0[0] = (unsigned)phys_addr; // Bitmap Display Controller 0 start, My Camera Image
break;
case '2' :
bmdc_axi_lites0[0] = (unsigned)phys_addr+3*SVGA_ALL_DISP_ADDRESS+0x8; // Another one ZYBO Camera Image
break;
case 's' :
if (caminf_mt9d111_inf_axis_0[1] == 0)
caminf_mt9d111_inf_axis_0[1] = 1; // left camera is stopped.
else
caminf_mt9d111_inf_axis_0[1] = 0; // left camere is started.
break;
case 'l' : // laplacian filter
// caminf_axis_switch_1, 1to2 ,Select M01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_1[16] = 0x80000000; // 0x40 = 0x80000000; disable
caminf_axis_switch_1[17] = 0; // 0x44 = 0;
caminf_axis_switch_1[0] = 0x2; // 0x0 = 2; Commit registers
// laplacian filter AXIS Start
laps_cntrl = caminf_lap_filter_axis_0[0] & 0x80; // Auto Restart bit
caminf_lap_filter_axis_0[0] = laps_cntrl | 0x01; // Start bit set
caminf_lap_filter_axis_0[0] = 0x80; // Auto Restart bit set
// caminf_axis_switch_0, 2to1, Select S01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_0[16] = 0x1; // 0x40 = 0x1;
caminf_axis_switch_0[0] = 0x2; // 0x0 = 2; Commit registers
break;
case 'c' : // camera image
// caminf_axis_switch_1, 1to2 ,Select M01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_1[16] = 0; // 0x44 = 0;
caminf_axis_switch_1[17] = 0x80000000; // 0x40 = 0x80000000; disable
caminf_axis_switch_1[0] = 0x2; // 0x0 = 2; Commit registers
// laplacian filter AXIS Start
caminf_lap_filter_axis_0[0] = 0x00; // Auto Restart Disable
// caminf_axis_switch_0, 2to1, Select S01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
caminf_axis_switch_0[16] = 0x0; // 0x40 = 0x0;
caminf_axis_switch_0[0] = 0x2; // 0x0 = 2; Commit registers
break;
}
c = getc(stdin);
}
munmap((void *)bmdc_axi_lites0, 0x10000);
munmap((void *)caminf_axi_vdma_0, 0x10000);
munmap((void *)dviin_axi_vdma_0, 0x10000);
munmap((void *)caminf_axi_iic, 0x10000);
munmap((void *)caminf_mt9d111_inf_axis_0, 0x10000);
munmap((void *)caminf_axis_switch_0, 0x10000);
munmap((void *)caminf_axis_switch_1, 0x10000);
munmap((void *)caminf_lap_filter_axis_0, 0x10000);
munmap((void *)frame_buffer, (XGA_ALL_DISP_ADDRESS*NUMBER_OF_WRITE_FRAMES)+(SVGA_ALL_DISP_ADDRESS*NUMBER_OF_WRITE_FRAMES));
close(fd0);
close(fd1);
close(fd2);
close(fd3);
close(fd4);
close(fd5);
close(fd6);
close(fd7);
close(fd9);
close(fd10);
return(0);
}
| 日 | 月 | 火 | 水 | 木 | 金 | 土 |
|---|---|---|---|---|---|---|
| - | - | - | - | - | 1 | 2 |
| 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 17 | 18 | 19 | 20 | 21 | 22 | 23 |
| 24 | 25 | 26 | 27 | 28 | 29 | 30 |