ISE Test Editorのヘルプを見ると、他にISimのブレークポイントなども設定できるようだ。 さらに”al”と入力して、CTRL+RETURNキーを押すと、下のようにalways, always_ff, always_combなどが予約語のリストに上がってきた。これってSystemVerilog対応の準備だろうか?マニュアルにはalways_ff, always_combが予約語とは書いていない。
恥ずかしながら、ISE Test Editorにオートコンプリート機能がついていることを知らなかった。皆さんは御存知でしたか? ISE Test Editorを快適に使えるようになってよかった。
always @(posedge clk) begin if (reset) d_ff <= 0; else begin for (i=0; i<num_of_d_ff; i=i+1) begin if (i==0) d_ff[0] <= code_in; else d_ff[i] <= d_ff[i-1]; end end end
assign code_out = d_ff[num_of_d_ff-1];
always @(posedge clk) begin for (j=0; j<200; j=j+1) begin test_out[j] <= d_ff[j*k_val]; end end endmodule
Design Information ------------------ Command Line : map -ise H:/HDL/FndtnISEWork/test/XPower_test/XPower_test.ise -intstyle ise -p xc4vfx12-sf363-10 -cm area -pr off -k 4 -c 100 -o XPower_test_map.ncd XPower_test.ngd XPower_test.pcf Target Device : xc4vfx12 Target Package : sf363 Target Speed : -10 Mapper Version : virtex4 -- $Revision: 1.46.12.2 $ Mapped Date : SAT 7 FEB 21:38:30 2009
Design Summary -------------- Number of errors: 0 Number of warnings: 0 Logic Utilization: Number of Slice Flip Flops: 10,200 out of 10,944 93% Number of 4 input LUTs: 20 out of 10,944 1% Logic Distribution: Number of occupied Slices: 5,151 out of 5,472 94% Number of Slices containing only related logic: 5,151 out of 5,151 100% Number of Slices containing unrelated logic: 0 out of 5,151 0% *See NOTES below for an explanation of the effects of unrelated logic. Total Number of 4 input LUTs: 20 out of 10,944 1% Number of bonded IOBs: 204 out of 240 85% Number of BUFG/BUFGCTRLs: 1 out of 32 3% Number used as BUFGs: 1
Peak Memory Usage: 237 MB Total REAL time to MAP completion: 13 secs Total CPU time to MAP completion: 12 secs
Target Device : xc4vfx12 Target Package : sf363 Target Speed : -10 Mapper Version : virtex4 -- $Revision: 1.46.12.2 $ Mapped Date : SUN 30 NOV 14:10:29 2008
Design Summary -------------- Number of errors: 0 Number of warnings: 19 Logic Utilization: Number of Slice Flip Flops: 688 out of 10,944 6% Number of Slice FFs used for DCM autocalibration logic: 14 out of 688 2% Number of 4 input LUTs: 689 out of 10,944 6% Number of LUTs used for DCM autocalibration logic: 8 out of 689 1% *See INFO below for an explanation of the DCM autocalibration logic added by Map Logic Distribution: Number of occupied Slices: 701 out of 5,472 12% Number of Slices containing only related logic: 701 out of 701 100% Number of Slices containing unrelated logic: 0 out of 701 0% *See NOTES below for an explanation of the effects of unrelated logic. Total Number of 4 input LUTs: 776 out of 10,944 7% Number used as logic: 519 Number used as a route-thru: 87 Number used for Dual Port RAMs: 156 (Two LUTs used per Dual Port RAM) Number used as Shift registers: 14 Number of bonded IOBs: 51 out of 240 21% IOB Flip Flops: 20 IOB Dual-Data Rate Flops: 2 Number of BUFG/BUFGCTRLs: 5 out of 32 15% Number used as BUFGs: 5 Number of DCM_ADVs: 2 out of 4 50% Number of ISERDESs: 18 out of 320 5% Number of OSERDESs: 22 out of 320 6% Number of IDELAYCTRLs: 12 out of 12 100% Number of BUFIOs: 2 out of 24 8%
Design Summary -------------- Number of errors: 0 Number of warnings: 11 Logic Utilization: Number of Slice Flip Flops: 2,137 out of 9,312 22% Number of 4 input LUTs: 3,444 out of 9,312 36% Logic Distribution: Number of occupied Slices: 2,455 out of 4,656 52% Number of Slices containing only related logic: 2,455 out of 2,455 100% Number of Slices containing unrelated logic: 0 out of 2,455 0% *See NOTES below for an explanation of the effects of unrelated logic. Total Number of 4 input LUTs: 3,549 out of 9,312 38% Number used as logic: 2,811 Number used as a route-thru: 105 Number used for Dual Port RAMs: 632 (Two LUTs used per Dual Port RAM) Number used as Shift registers: 1 Number of bonded IOBs: 64 out of 232 27% IOB Flip Flops: 18 Number of IDDR2s used: 16 Number of DDR_ALIGNMENT = NONE 16 Number of DDR_ALIGNMENT = C0 0 Number of DDR_ALIGNMENT = C1 0 Number of ODDR2s used: 38 Number of DDR_ALIGNMENT = NONE 38 Number of DDR_ALIGNMENT = C0 0 Number of DDR_ALIGNMENT = C1 0 Number of RAMB16s: 7 out of 20 35% Number of BUFGMUXs: 5 out of 24 20% Number of DCMs: 2 out of 4 50% Number of MULT18X18SIOs: 3 out of 20 15%