１．Vivado 2013.4のプロジェクトを作製する。
２．IP Integrator で、Block Design (Vivado_ZYBO_led_test) を作製する。
３．Gnerate Block Desgin を行う。
４．Synthesis を行う。
５．Open Synthesized Design を起動して、配置制約、IO_STANDARD制約を生成する。
６．Implementaion, Benerate Bitstream を行う。
７．Export Hardware for SDK... を実行して、ハードウェアをSDKにエクスポートして、SDKを同時に立ち上げる。
８．SDKでApplication Project (led_axi_lite_slave) を作製する。
９・SDKで、Program FPGAでZynqのFPGA部にビットストリームをダウンロードする。
１０．SDKで、led_axi_lite_slaveのRun Configuration を作製し、Runを実行する。
ZYNQ XC7Z2010-1CLG400C
512MB x32 DDR3 w/ 1050Mbps bandwidth
Dual-role (Source/Sink) HDMI port
16-bits per pixel VGA output port
Trimode (1Gbit/100Mbit/10Mbit) Ethernet PHY
MicroSD slot (supports Linux file system)
OTG USB 2.0 PHY (supports host and device)
External EEPROM (programmed with 48-bit globally unique EUI-48/64™ compatible identifier)
Audio codec with headphone out, microphone and line in jacks
128Mb Serial Flash w/ QSPI interface
On-board JTAG programming and UART to USB converter
GPIO: 6 pushbuttons, 4 slide switches, 5 LEDs
Six Pmod connectors (1 processor-dedicated, 1 dual analog/digital)
NET "vga_blue[0]" LOC = Y21;
NET "vga_blue[1]" LOC = Y20;
NET "vga_blue[2]" LOC = AB20;
NET "vga_blue[3]" LOC = AB19;
NET "vga_blue[0]" IOSTANDARD = LVCMOS33;
NET "vga_blue[1]" IOSTANDARD = LVCMOS33;
NET "vga_blue[2]" IOSTANDARD = LVCMOS33;
NET "vga_blue[3]" IOSTANDARD = LVCMOS33;
INST "vga_blue_0_OBUF" IOB =FORCE;
INST "vga_blue_1_OBUF" IOB =FORCE;
INST "vga_blue_2_OBUF" IOB =FORCE;
INST "vga_blue_3_OBUF" IOB =FORCE;
NET "vga_green[0]" LOC = AB22;
NET "vga_green[1]" LOC = AA22;
NET "vga_green[2]" LOC = AB21;
NET "vga_green[3]" LOC = AA21;
NET "vga_green[0]" IOSTANDARD = LVCMOS33;
NET "vga_green[1]" IOSTANDARD = LVCMOS33;
NET "vga_green[2]" IOSTANDARD = LVCMOS33;
NET "vga_green[3]" IOSTANDARD = LVCMOS33;
INST "vga_green_0_OBUF" IOB =FORCE;
INST "vga_green_1_OBUF" IOB =FORCE;
INST "vga_green_2_OBUF" IOB =FORCE;
INST "vga_green_3_OBUF" IOB =FORCE;
NET "vga_red[0]" LOC = V20;
NET "vga_red[1]" LOC = U20;
NET "vga_red[2]" LOC = V19;
NET "vga_red[3]" LOC = V18;
NET "vga_red[0]" IOSTANDARD = LVCMOS33;
NET "vga_red[1]" IOSTANDARD = LVCMOS33;
NET "vga_red[2]" IOSTANDARD = LVCMOS33;
NET "vga_red[3]" IOSTANDARD = LVCMOS33;
INST "vga_red_0_OBUF" IOB =FORCE;
INST "vga_red_1_OBUF" IOB =FORCE;
INST "vga_red_2_OBUF" IOB =FORCE;
INST "vga_red_3_OBUF" IOB =FORCE;
NET "vga_hsync" LOC = AA19;
NET "vga_vsync" LOC = Y19;
NET "vga_hsync" IOSTANDARD = LVCMOS33;
NET "vga_vsync" IOSTANDARD = LVCMOS33;
INST "vga_hsync_OBUF" IOB =FORCE;
INST "vga_vsync_OBUF" IOB =FORCE;
INST "hdmi_clk_OBUF" IOB =FORCE;
NET "hdmi_clk" LOC = W18;
NET "hdmi_clk" IOSTANDARD = LVCMOS33;
INST "hdmi_vsync_OBUF" IOB =FORCE;
NET "hdmi_vsync" LOC = W17;
NET "hdmi_vsync" IOSTANDARD = LVCMOS33;
INST "hdmi_hsync_OBUF" IOB =FORCE;
NET "hdmi_hsync" LOC = V17;
NET "hdmi_hsync" IOSTANDARD = LVCMOS33;
INST "hdmi_data_e_OBUF" IOB =FORCE;
NET "hdmi_data_e" LOC = U16;
NET "hdmi_data_e" IOSTANDARD = LVCMOS33;
INST "hdmi_data_0_OBUF" IOB =FORCE;
NET "hdmi_data[0]" LOC = Y13;
NET "hdmi_data[0]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_1_OBUF" IOB =FORCE;
NET "hdmi_data[1]" LOC = AA13;
NET "hdmi_data[1]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_2_OBUF" IOB =FORCE;
NET "hdmi_data[2]" LOC = AA14;
NET "hdmi_data[2]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_3_OBUF" IOB =FORCE;
NET "hdmi_data[3]" LOC = Y14;
NET "hdmi_data[3]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_4_OBUF" IOB =FORCE;
NET "hdmi_data[4]" LOC = AB15;
NET "hdmi_data[4]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_5_OBUF" IOB =FORCE;
NET "hdmi_data[5]" LOC = AB16;
NET "hdmi_data[5]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_6_OBUF" IOB =FORCE;
NET "hdmi_data[6]" LOC = AA16;
NET "hdmi_data[6]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_7_OBUF" IOB =FORCE;
NET "hdmi_data[7]" LOC = AB17;
NET "hdmi_data[7]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_8_OBUF" IOB =FORCE;
NET "hdmi_data[8]" LOC = AA17;
NET "hdmi_data[8]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_9_OBUF" IOB =FORCE;
NET "hdmi_data[9]" LOC = Y15;
NET "hdmi_data[9]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_10_OBUF" IOB =FORCE;
NET "hdmi_data[10]" LOC = W13;
NET "hdmi_data[10]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_11_OBUF" IOB =FORCE;
NET "hdmi_data[11]" LOC = W15;
NET "hdmi_data[11]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_12_OBUF" IOB =FORCE;
NET "hdmi_data[12]" LOC = V15;
NET "hdmi_data[12]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_13_OBUF" IOB =FORCE;
NET "hdmi_data[13]" LOC = U17;
NET "hdmi_data[13]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_14_OBUF" IOB =FORCE;
NET "hdmi_data[14]" LOC = V14;
NET "hdmi_data[14]" IOSTANDARD = LVCMOS33;
INST "hdmi_data_15_OBUF" IOB =FORCE;
NET "hdmi_data[15]" LOC = V13;
NET "hdmi_data[15]" IOSTANDARD = LVCMOS33;
NET "hdmi_iic_Scl" LOC = AA18;
NET "hdmi_iic_Scl" IOSTANDARD = LVCMOS33;
NET "hdmi_iic_Sda" LOC = Y16;
NET "hdmi_iic_Sda" IOSTANDARD = LVCMOS33;
NET "hdmi_data[15]" SLEW = FAST;
NET "hdmi_data[14]" SLEW = FAST;
NET "hdmi_data[13]" SLEW = FAST;
NET "hdmi_data[12]" SLEW = FAST;
NET "hdmi_data[11]" SLEW = FAST;
NET "hdmi_data[10]" SLEW = FAST;
NET "hdmi_data[9]" SLEW = FAST;
NET "hdmi_data[8]" SLEW = FAST;
NET "hdmi_data[7]" SLEW = FAST;
NET "hdmi_data[6]" SLEW = FAST;
NET "hdmi_data[5]" SLEW = FAST;
NET "hdmi_data[4]" SLEW = FAST;
NET "hdmi_data[3]" SLEW = FAST;
NET "hdmi_data[2]" SLEW = FAST;
NET "hdmi_data[1]" SLEW = FAST;
NET "hdmi_data[0]" SLEW = FAST;
NET "vga_blue[3]" SLEW = FAST;
NET "vga_blue[2]" SLEW = FAST;
NET "vga_blue[1]" SLEW = FAST;
NET "vga_blue[0]" SLEW = FAST;
NET "vga_green[3]" SLEW = FAST;
NET "vga_green[2]" SLEW = FAST;
NET "vga_green[1]" SLEW = FAST;
NET "vga_green[0]" SLEW = FAST;
NET "vga_red[3]" SLEW = FAST;
NET "vga_red[2]" SLEW = FAST;
NET "vga_red[1]" SLEW = FAST;
NET "vga_red[0]" SLEW = FAST;
NET "hdmi_clk" SLEW = FAST;
NET "hdmi_data_e" SLEW = FAST;
NET "hdmi_hsync" SLEW = FAST;
NET "hdmi_iic_Scl" SLEW = SLOW;
NET "hdmi_vsync" SLEW = FAST;
NET "vga_hsync" SLEW = FAST;
NET "vga_vsync" SLEW = FAST;
NET "mt9d111_d[7]" LOC = W12;
NET "mt9d111_d[6]" LOC = V12;
NET "mt9d111_d[5]" LOC = W11;
NET "mt9d111_d[4]" LOC = W10;
NET "mt9d111_d[3]" LOC = V10;
NET "mt9d111_d[2]" LOC = V9;
NET "mt9d111_d[1]" LOC = W8;
NET "mt9d111_d[0]" LOC = V8;
NET "mt9d111_d[7]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[6]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[5]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[4]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[3]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[2]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[1]" IOSTANDARD = LVCMOS33;
NET "mt9d111_d[0]" IOSTANDARD = LVCMOS33;
NET "mt9d111_href" LOC = AB10;
NET "mt9d111_pclk" LOC = AA9;
NET "mt9d111_Scl" LOC = Y11;
NET "mt9d111_Sda" LOC = AB11;
NET "mt9d111_standby" LOC = Y10;
NET "mt9d111_vsync" LOC = AA11;
NET "mt9d111_xck" LOC = AA8;
NET "mt9d111_href" IOSTANDARD = LVCMOS33;
NET "mt9d111_pclk" IOSTANDARD = LVCMOS33;
NET "mt9d111_Scl" IOSTANDARD = LVCMOS33;
NET "mt9d111_Sda" IOSTANDARD = LVCMOS33;
NET "mt9d111_standby" IOSTANDARD = LVCMOS33;
NET "mt9d111_vsync" IOSTANDARD = LVCMOS33;
NET "mt9d111_xck" IOSTANDARD = LVTTL;
NET "mt9d111_d[0]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[1]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[2]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[3]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[4]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[5]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[6]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_d[7]" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_href" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_vsync" OFFSET = IN 10.8 ns VALID 21.7 ns BEFORE "mt9d111_pclk" RISING;
NET "mt9d111_Scl" PULLUP;
NET "mt9d111_Sda" PULLUP;
Xil_Out32((XPAR_AXI_VDMA_0_BASEADDR+0x30), 0x3); // S2MM_DMACR
・vcse_server.exe
・hw_server.exe
・BRAMは10で変化なし
・DSPは以前の16から34に増えた
・FFは、1961から2243に増えた
・LUTは、2146から2298に増えた
・Latencyは、1450201~69427730201 から 1450201~2910730201になった。
・Intervalは、1450201~69427730201 から 1450201~2910730201になった。
// laplacian_filter.c
// lap_filter_axim()
#include <stdio.h>
#include <string.h>
#define HORIZONTAL_PIXEL_WIDTH 800
#define VERTICAL_PIXEL_WIDTH 600
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
int laplacian_fil(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2);
int conv_rgb2y(int rgb);
int lap_filter_axim(int cam_addr, int lap_addr, volatile int *cam_fb, volatile int *lap_fb)
{
#pragma HLS RESOURCE variable=cam_addr core=AXI4LiteS metadata="-bus_bundle LiteS"
#pragma HLS RESOURCE variable=lap_addr core=AXI4LiteS metadata="-bus_bundle LiteS"
#pragma HLS RESOURCE variable=return core=AXI4LiteS metadata="-bus_bundle LiteS"
#pragma HLS INTERFACE ap_bus port=cam_fb depth=480000
#pragma HLS INTERFACE ap_bus port=lap_fb depth=480000
#pragma HLS RESOURCE variable=cam_fb core=AXI4M
#pragma HLS RESOURCE variable=lap_fb core=AXI4M
unsigned int line_buf[3][HORIZONTAL_PIXEL_WIDTH];
unsigned int lap_buf[HORIZONTAL_PIXEL_WIDTH];
int x, y;
int lap_fil_val;
int a, b;
int fl, sl, tl;
unsigned int offset_cam_addr, offset_lap_addr;
int *cam_fb_addr, *lap_fb_addr;
offset_cam_addr = cam_addr/sizeof(int);
offset_lap_addr = lap_addr/sizeof(int);
// RGB値をY（輝度成分）のみに変換し、ラプラシアンフィルタを掛けた。
for (y=0; y<VERTICAL_PIXEL_WIDTH; y++){
fl = (y-1)%3; // 最初のライン, y=1 012, y=2 120, y=3 201, y=4 012
sl = y%3; // 2番めのライン
tl = (y+1)%3; // 3番目のライン
for (x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
if (y==0 || y==VERTICAL_PIXEL_WIDTH-1){ // 縦の境界の時の値は0とする
lap_fil_val = 0;
}else if (x==0 || x==HORIZONTAL_PIXEL_WIDTH-1){ // 横の境界の時も値は0とする
lap_fil_val = 0;
}else{
if (x == 1){ // ラインの最初でラインの画素を読み出す
if (y == 1){ // 最初のラインでは3ライン分の画素を読み出す
for (a=0; a<3; a++){ // 3ライン分
cam_fb_addr = (int*)(cam_fb+offset_cam_addr+(a*(HORIZONTAL_PIXEL_WIDTH)));
memcpy(&line_buf[a][0], (const int*)cam_fb_addr, HORIZONTAL_PIXEL_WIDTH*sizeof(int));
for (b=0; b<HORIZONTAL_PIXEL_WIDTH; b++){ // ライン
line_buf[a][b] = conv_rgb2y(line_buf[a][b]); // カラーから白黒へ
}
}
} else { // 最初のラインではないので、1ラインだけ読み込む。すでに他の2ラインは読み込まれている
cam_fb_addr = (int*)(cam_fb+offset_cam_addr+((y+1)*(HORIZONTAL_PIXEL_WIDTH)));
memcpy(line_buf[(y+1)%3], (const int*)cam_fb_addr, HORIZONTAL_PIXEL_WIDTH*sizeof(int));
for (b=0; b<HORIZONTAL_PIXEL_WIDTH; b++){ // ライン
line_buf[(y+1)%3][b] = conv_rgb2y(line_buf[(y+1)%3][b]); // カラーから白黒へ
}
}
}
lap_fil_val = laplacian_fil(line_buf[fl][x-1], line_buf[fl][x], line_buf[fl][x+1], line_buf[sl][x-1], line_buf[sl][x], line_buf[sl][x+1], line_buf[tl][x-1], line_buf[tl][x], line_buf[tl][x+1]);
}
lap_buf[x] = (lap_fil_val<<16)+(lap_fil_val<<8)+lap_fil_val; // RGB同じ値を入れる
}
lap_fb_addr = (int *)(lap_fb+offset_lap_addr+(y*(HORIZONTAL_PIXEL_WIDTH)));
memcpy(lap_fb_addr, (const int*)lap_buf, HORIZONTAL_PIXEL_WIDTH*sizeof(int));
}
return(7);
}
// RGBからYへの変換
// RGBのフォーマットは、{8'd0, R(8bits), G(8bits), B(8bits)}, 1pixel = 32bits
// 輝度信号Yのみに変換する。変換式は、Y = 0.299R + 0.587G + 0.114B
// "YUVフォーマット及び YUV<->RGB変換"を参考にした。http://vision.kuee.kyoto-u.ac.jp/~hiroaki/firewire/yuv.html
// 2013/09/27 : float を止めて、すべてint にした
int conv_rgb2y(int rgb){
int r, g, b, y_f;
int y;
b = rgb & 0xff;
g = (rgb>>8) & 0xff;
r = (rgb>>16) & 0xff;
y_f = 77*r + 150*g + 29*b; //y_f = 0.299*r + 0.587*g + 0.114*b;の係数に256倍した
y = y_f >> 8; // 256で割る
return(y);
}
// ラプラシアンフィルタ
// x0y0 x1y0 x2y0 -1 -1 -1
// x0y1 x1y1 x2y1 -1 8 -1
// x0y2 x1y2 x2y2 -1 -1 -1
int laplacian_fil(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2)
{
int y;
y = -x0y0 -x1y0 -x2y0 -x0y1 +8*x1y1 -x2y1 -x0y2 -x1y2 -x2y2;
if (y<0)
y = 0;
else if (y>255)
y = 255;
return(y);
}
// Testbench of laplacian_filter.c
// M系列データをハードウェアとソフトウェアで、ラプラシアン・フィルタを掛けて、それを比較する
//
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#define HORIZONTAL_PIXEL_WIDTH 800
#define VERTICAL_PIXEL_WIDTH 600
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
int laplacian_fil_soft(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2);
int conv_rgb2y_soft(int rgb);
int lap_filter_axim(int cam_addr, int lap_addr, volatile int *cam_fb, volatile int *lap_fb); // hardware
void laplacian_filter_soft(volatile int *cam_fb, volatile int *lap_fb); // software
int mseq_po[ALL_PIXEL_VALUE];
int hw_lap_po[ALL_PIXEL_VALUE];
int sf_lap_po[ALL_PIXEL_VALUE];
int main()
{
// int *mseq_po, *hw_lap_po, *sf_lap_po;
int *s, *h;
int x, y;
int lfsr = 1;
int cam_addr, lap_addr;
// ピクセルデータ領域にM系列データを入力
for (y=0, s=mseq_po; y<VERTICAL_PIXEL_WIDTH; y++){
for (x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
lfsr = (lfsr >> 1) ^ (-(lfsr & 1) & 0xd0000001); /* taps 32 31 29 1 */
// ”線形帰還シフトレジスタ ”参照 : http://ja.wikipedia.org/wiki/%E7%B7%9A%E5%BD%A2%E5%B8%B0%E9%82%84%E3%82%B7%E3%83%95%E3%83%88%E3%83%AC%E3%82%B8%E3%82%B9%E3%82%BF
*s = lfsr;
s++;
}
}
cam_addr = (int)mseq_po;
lap_addr = (int)hw_lap_po;
lap_filter_axim(cam_addr, lap_addr, (volatile int *)0, (volatile int *)0); // ハードウェアのラプラシアン・フィルタ
laplacian_filter_soft(mseq_po, sf_lap_po); // ソフトウェアのラプラシアン・フィルタ
// ハードウェアとソフトウェアのラプラシアン・フィルタの値のチェック
for (y=0, h=hw_lap_po, s=sf_lap_po; y<VERTICAL_PIXEL_WIDTH; y++){
for (x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
if (*h != *s){
printf("ERROR HW and SW results mismatch HW = %d, SW = %d\n", *h, *s);
return(1);
} else {
h++;
s++;
}
}
}
printf("Success HW and SW results match\n");
}
void laplacian_filter_soft(volatile int *cam_fb, volatile int *lap_fb)
{
int x, y;
int lap_fil_val;
int xy[3][3];
int a, b;
// RGB値をY（輝度成分）のみに変換し、ラプラシアンフィルタを掛けた。
for (y=0; y<VERTICAL_PIXEL_WIDTH; y++){
for (x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
if (y==0 || y==VERTICAL_PIXEL_WIDTH-1){ // 縦の境界の時の値は0とする
lap_fil_val = 0;
}else if (x==0 || x==HORIZONTAL_PIXEL_WIDTH-1){ // 横の境界の時も値は0とする
lap_fil_val = 0;
}else{
for (a=0; a<3; a++){
for (b=0; b<3; b++){
xy[a][b] = conv_rgb2y_soft(cam_fb[((y+b-1)*HORIZONTAL_PIXEL_WIDTH)+x+a-1]);
}
}
lap_fil_val = laplacian_fil_soft(xy[0][0], xy[1][0], xy[2][0], xy[0][1], xy[1][1], xy[2][1], xy[0][2], xy[1][2], xy[2][2]);
}
lap_fb[y*HORIZONTAL_PIXEL_WIDTH+x] = (lap_fil_val<<16)+(lap_fil_val<<8)+lap_fil_val; // RGB同じ値を入れる
}
}
}
// RGBからYへの変換
// RGBのフォーマットは、{8'd0, R(8bits), G(8bits), B(8bits)}, 1pixel = 32bits
// 輝度信号Yのみに変換する。変換式は、Y = 0.299R + 0.587G + 0.114B
// "YUVフォーマット及び YUV<->RGB変換"を参考にした。http://vision.kuee.kyoto-u.ac.jp/~hiroaki/firewire/yuv.html
// 2013/09/27 : float を止めて、すべてint にした
int conv_rgb2y_soft(int rgb){
int r, g, b, y_f;
int y;
b = rgb & 0xff;
g = (rgb>>8) & 0xff;
r = (rgb>>16) & 0xff;
y_f = 77*r + 150*g + 29*b; //y_f = 0.299*r + 0.587*g + 0.114*b;の係数に256倍した
y = y_f >> 8; // 256で割る
return(y);
}
// ラプラシアンフィルタ
// x0y0 x1y0 x2y0 -1 -1 -1
// x0y1 x1y1 x2y1 -1 8 -1
// x0y2 x1y2 x2y2 -1 -1 -1
int laplacian_fil_soft(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2)
{
int y;
y = -x0y0 -x1y0 -x2y0 -x0y1 +8*x1y1 -x2y1 -x0y2 -x1y2 -x2y2;
if (y<0)
y = 0;
else if (y>255)
y = 255;
return(y);
}
// lap_filter_axim.c
// AXI4 Master のVivado HLS出力ハードウェア・バージョン
// RGBをYに変換後にラプラシアンフィルタを掛ける。
// ピクセルのフォーマットは、{8'd0, R(8bits), G(8bits), B(8bits)}, 1pixel = 32bits
// 2013/10/15
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <dirent.h>
#include <fcntl.h>
#include <assert.h>
#include <ctype.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <unistd.h>
#include <linux/kernel.h>
#include "lap_fil_axim_uty.h"
#define LAP_FILTER_AXIM_HW_ADDRESS 0x49000000 // ラプラシアン・フィルタのAXI4 Masterハードウェアのアドレス
#define HORIZONTAL_PIXEL_WIDTH 800
#define VERTICAL_PIXEL_WIDTH 600
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#define PAGE_SIZE (4*1024)
#define BLOCK_SIZE (4*1024)
#define BUFSIZE 1024
#define MEASURE_COUNT 5000
int conv_rgb2y(int rgb);
int chkhex(char *str);
volatile unsigned *setup_io(off_t mapped_addr, unsigned int *buf_addr);
int main()
{
FILE *fd;
unsigned int bitmap_dc_reg_addr;
unsigned int read_num;
volatile unsigned *bm_disp_cnt_reg;
unsigned int fb_addr, next_frame_addr;
int return_val;
struct timeval start_time, end_time;
unsigned int rmmap_cnt=0, wmmap_cnt=0;
unsigned int lap_fil_hw, *lap_fil_hw_addr;
char buf[BUFSIZE], *token;
unsigned int val;
unsigned int bitmap_buf;
gettimeofday(&start_time, NULL); // プログラム起動時の時刻を記録
// fb_start_addr.txt の内容をパイプに入れる
memset(buf, '\0', sizeof(buf)); // buf すべてに\0 を入れる
// fb_start_addr.txt を開く
fd = popen("cat /Apps/fb_start_addr.txt", "r");
if (fd != NULL){
read_num = fread(buf, sizeof(unsigned char), BUFSIZE, fd);
if (read_num > 0){
sscanf(buf, "%x\n", &fb_addr);
}
}
pclose(fd);
// ラプラシアンフィルタの結果を入れておくフレーム・バッファ
next_frame_addr = ((fb_addr + (ALL_PIXEL_VALUE*4)) & (~(int)(PAGE_SIZE-1))) + PAGE_SIZE;
// Vivado HLS で作製したラプラシアン・フィルタIPのアドレスを取得
lap_fil_hw_addr = setup_io((off_t)LAP_FILTER_AXIM_HW_ADDRESS, &lap_fil_hw);
lap_fil_initialize(lap_fil_hw_addr); // ラプラシアン・フィルタIPの初期化とap_start
// ラプラシアン・フィルタAXI4 Master IPスタート
return_val = laplacian_fil_hw(lap_fil_hw_addr, fb_addr, next_frame_addr);
printf("return Value = %d\n", return_val);
munmap((unsigned int *)lap_fil_hw_addr, BLOCK_SIZE);
free((unsigned int *)lap_fil_hw);
// bitmap-disp-cntrler-axi-master のアドレスを取得
memset(buf, '\0', sizeof(buf)); // buf すべてに\0 を入れる
// ls /sys/devices/axi.0 の内容をパイプに入れる
fd = popen("ls /sys/devices/axi.0", "r");
if (fd != NULL){
read_num = fread(buf, sizeof(unsigned char), BUFSIZE, fd);
if (read_num > 0){
token = buf;
if ((token=strtok(token, ".\n")) != NULL){
do {
if (chkhex(token)){ // 16進数
sscanf(token, "%x", &val);
} else {
if (strcmp(token, "bitmap-disp-cntrler-axi-master") == 0)
bitmap_dc_reg_addr = val;
}
}while((token=strtok(NULL, ".\n")) != NULL);
}
}
}
pclose(fd);
// ラプラシアンフィルタの掛かった画像のスタートアドレスを bitmap-disp-cntrler-axi-master にセット
bm_disp_cnt_reg = setup_io((off_t)bitmap_dc_reg_addr, &bitmap_buf);
*bm_disp_cnt_reg = next_frame_addr;
munmap((unsigned int *)bm_disp_cnt_reg, BLOCK_SIZE);
free((unsigned int *)bitmap_buf);
gettimeofday(&end_time, NULL);
printf("rmmap_cnt = %d\n", rmmap_cnt);
printf("wmmap_cnt = %d\n", wmmap_cnt);
if (end_time.tv_usec < start_time.tv_usec) {
printf("total time = %d.%d sec\n", end_time.tv_sec - start_time.tv_sec - 1, 1000000 + end_time.tv_usec - start_time.tv_usec);
}
else {
printf("total time = %d.%d sec\n", end_time.tv_sec - start_time.tv_sec, end_time.tv_usec - start_time.tv_usec);
}
return(0);
}
// RGBからYへの変換
// RGBのフォーマットは、{8'd0, R(8bits), G(8bits), B(8bits)}, 1pixel = 32bits
// 輝度信号Yのみに変換する。変換式は、Y = 0.299R + 0.587G + 0.114B
// "YUVフォーマット及び YUV<->RGB変換"を参考にした。http://vision.kuee.kyoto-u.ac.jp/~hiroaki/firewire/yuv.html
// 2013/09/27 : float を止めて、すべてint にした
int conv_rgb2y(int rgb){
int r, g, b, y_f;
int y;
b = rgb & 0xff;
g = (rgb>>8) & 0xff;
r = (rgb>>16) & 0xff;
y_f = 77*r + 150*g + 29*b; //y_f = 0.299*r + 0.587*g + 0.114*b;の係数に256倍した
y = y_f >> 8; // 256で割る
return(y);
}
//
// Set up a memory regions to access GPIO
//
volatile unsigned *setup_io(off_t mapped_addr, unsigned int *buf_addr)
// void setup_io()
{
int mem_fd;
char *gpio_mem, *gpio_map;
/* open /dev/mem */
if ((mem_fd = open("/dev/mem", O_RDWR|O_SYNC) ) < 0) {
printf("can't open /dev/mem \n");
printf("mapped_addr = %x\n", mapped_addr);
exit (-1);
}
/* mmap GPIO */
// Allocate MAP block
if ((gpio_mem = malloc(BLOCK_SIZE + (PAGE_SIZE-1))) == NULL) {
printf("allocation error \n");
exit (-1);
}
*buf_addr = gpio_mem; // mallocしたアドレスをコピー
// Make sure pointer is on 4K boundary
if ((unsigned long)gpio_mem % PAGE_SIZE)
gpio_mem += PAGE_SIZE - ((unsigned long)gpio_mem % PAGE_SIZE);
// Now map it
gpio_map = (unsigned char *)mmap(
(caddr_t)gpio_mem,
BLOCK_SIZE,
PROT_READ|PROT_WRITE,
MAP_SHARED|MAP_FIXED,
mem_fd,
mapped_addr
);
if ((long)gpio_map < 0) {
printf("mmap error %d\n", (int)gpio_map);
printf("mapped_addr = %x\n", mapped_addr);
exit (-1);
}
close(mem_fd); // /dev/mem のクローズ
// Always use volatile pointer!
// gpio = (volatile unsigned *)gpio_map;
return((volatile unsigned *)gpio_map);
} // setup_io
// 文字列が16進数かを調べる
int chkhex(char *str){
while (*str != '\0'){
if (!isxdigit(*str))
return 0;
str++;
}
return 1;
}
/*
* lap_fil_axim_uty.c
*
* Created on: 2013/10/15
* Author: Masaaki
*/
#include "xlap_filter_axim_hw.h"
#define AP_START_BIT_POS 1 // ap_start のビット位置 bit0
#define AP_DONE_BIT_POS 2 // ap_done のビット位置 bit1
#define AP_AUTO_RESTART_BIT_POS 0x80 // auto_restart のビット位置 bit7
#define VLD_BIT_POS 1
void lap_fil_initialize(unsigned int *lap_fil_hw_addr)
{
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_AP_CTRL) = 0;
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_GIE) = 0;
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_IER) = 1; // ap_done=1
}
// ラプラシアン・フィルタ・スタート
int laplacian_fil_hw(unsigned int *lap_fil_hw_addr, unsigned int cam_fb, unsigned int lap_fb)
{
int ap_status, ap_done;
int ap_return;
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_CAM_ADDR_DATA) = cam_fb;
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_LAP_ADDR_DATA) = lap_fb;
// ap_start enable
*(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_AP_CTRL) = AP_START_BIT_POS;
// wait ap_done
do{
ap_status = *(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_AP_CTRL);
ap_done = ap_status & AP_DONE_BIT_POS;
}while(!ap_done);
// ap_return read
ap_return = *(volatile int *)((unsigned int)lap_fil_hw_addr + (unsigned int)XLAP_FILTER_AXIM_LITES_ADDR_AP_RETURN);
//printf("ap_return = %d\n", ap_return);
return(ap_return);
}
/*
* lap_fil_axim_uty.h
*
* Created on: 2013/10/15
* Author: Masaaki
*/
#ifndef LAP_FIL_AXIM_UTY_H_
#define LAP_FIL_AXIM_UTY_H_
void lap_fil_initialize(unsigned int *lap_fil_hw_addr);
int laplacian_fil_hw(unsigned int *lap_fil_hw_addr, unsigned int *cam_fb, unsigned int *lap_fb);
#endif /* LAP_FIL_AXIM_UTY_H_ */
// ==============================================================
// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
// Version: 2013.4
// Copyright (C) 2013 Xilinx Inc. All rights reserved.
//
// ==============================================================
// LiteS
// 0x00 : Control signals
// bit 0 - ap_start (Read/Write/COH)
// bit 1 - ap_done (Read/COR)
// bit 2 - ap_idle (Read)
// bit 3 - ap_ready (Read)
// bit 7 - auto_restart (Read/Write)
// others - reserved
// 0x04 : Global Interrupt Enable Register
// bit 0 - Global Interrupt Enable (Read/Write)
// others - reserved
// 0x08 : IP Interrupt Enable Register (Read/Write)
// bit 0 - Channel 0 (ap_done)
// bit 1 - Channel 1 (ap_ready)
// others - reserved
// 0x0c : IP Interrupt Status Register (Read/TOW)
// bit 0 - Channel 0 (ap_done)
// bit 1 - Channel 1 (ap_ready)
// others - reserved
// 0x10 : reserved
// 0x14 : Data signal of cam_addr
// bit 31~0 - cam_addr[31:0] (Read/Write)
// 0x18 : reserved
// 0x1c : Data signal of lap_addr
// bit 31~0 - lap_addr[31:0] (Read/Write)
// 0x20 : Data signal of ap_return
// bit 31~0 - ap_return[31:0] (Read)
// (SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake)
#define XLAP_FILTER_AXIM_LITES_ADDR_AP_CTRL 0x00
#define XLAP_FILTER_AXIM_LITES_ADDR_GIE 0x04
#define XLAP_FILTER_AXIM_LITES_ADDR_IER 0x08
#define XLAP_FILTER_AXIM_LITES_ADDR_ISR 0x0c
#define XLAP_FILTER_AXIM_LITES_ADDR_CAM_ADDR_DATA 0x14
#define XLAP_FILTER_AXIM_LITES_BITS_CAM_ADDR_DATA 32
#define XLAP_FILTER_AXIM_LITES_ADDR_LAP_ADDR_DATA 0x1c
#define XLAP_FILTER_AXIM_LITES_BITS_LAP_ADDR_DATA 32
#define XLAP_FILTER_AXIM_LITES_ADDR_AP_RETURN 0x20
#define XLAP_FILTER_AXIM_LITES_BITS_AP_RETURN 32
//------------------------Address Info-------------------
// 0x00 : Control signals
// bit 0 - ap_start (Read/Write/COH)
// bit 1 - ap_done (Read/COR)
// bit 2 - ap_idle (Read)
// bit 3 - ap_ready (Read)
// bit 7 - auto_restart (Read/Write)
// others - reserved
// 0x04 : Global Interrupt Enable Register
// bit 0 - Global Interrupt Enable (Read/Write)
// others - reserved
// 0x08 : IP Interrupt Enable Register (Read/Write)
// bit 0 - Channel 0 (ap_done)
// bit 1 - Channel 1 (ap_ready)
// others - reserved
// 0x0c : IP Interrupt Status Register (Read/TOW)
// bit 0 - Channel 0 (ap_done)
// bit 1 - Channel 1 (ap_ready)
// others - reserved
// 0x10 : reserved
// 0x14 : Data signal of cam_addr
// bit 31~0 - cam_addr[31:0] (Read/Write)
// 0x18 : reserved
// 0x1c : Data signal of lap_addr
// bit 31~0 - lap_addr[31:0] (Read/Write)
// 0x20 : Data signal of ap_return
// bit 31~0 - ap_return[31:0] (Read)
// (SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake)
10000014
00000000
1000001c
00075300
10000000
00000001
ffffffff
１．最初のラインのオール0をラプラシアンフィルタの結果としてWriteする。
２．元画像 3ラインをReadする。
３．ラプラシアンフィルタの結果を1ライン分 Writeする。
４．次からは、1ラインずつReadして、ラプラシアンフィルタの結果をWriteする。
１．system_top_tbがシミュレーションのテストベンチで最上位ということになる。
２．その下に、system_topを uut してインスタンスしてある。
３．systemという名前のXPSプロジェクトが、system_i という名前でインスタンスしてある。
４．XPSプロジェクトに下に、 mem_sim_axi_slave_0をインスタンスしてある。
５．mem_sim_axi_slaveでは、memory_8bit を memory_8bit_i というインスタンス名で generate 文でインスタンスしてある。
// instance memory_8bit
generate
genvar i;
for (i=(C_S_AXI_DATA_WIDTH/8-1); i>=0; i=i-1) begin : MEMORY_GEN
memory_8bit #(
.C_S_AXI_ADDR_WIDTH(C_S_AXI_ADDR_WIDTH),
.C_MEMORY_SIZE(C_MEMORY_SIZE)
) memory_8bit_i (
.clk(ACLK),
.waddr(waddr),
.write_data(S_AXI_WDATA[i*8+7:i*8]),
.write_enable(wready & S_AXI_WVALID),
.byte_enable(S_AXI_WSTRB[i]),
.raddr(raddr),
.read_data(S_AXI_RDATA[i*8+7:i*8])
);
end
endgenerate
// R, G, B 毎に違った生成多項式のM系列を用意した
function [7:0] mseqf8_R (input [7:0] din);
reg xor_result;
begin
xor_result = din[7] ^ din[3] ^ din[2] ^ din[1];
mseqf8_R = {din[6:0], xor_result};
end
endfunction
function [7:0] mseqf8_G (input [7:0] din);
reg xor_result;
begin
xor_result = din[7] ^ din[4] ^ din[2] ^ din[0];
mseqf8_G = {din[6:0], xor_result};
end
endfunction
function [7:0] mseqf8_B (input [7:0] din);
reg xor_result;
begin
xor_result = din[7] ^ din[5] ^ din[2] ^ din[1];
mseqf8_B = {din[6:0], xor_result};
end
endfunction
// M系列を使用した擬似ランダム数でメモリの半分を初期化した
initial begin : memory_init_zero
integer i;
for (i=0; i<480000; i=i+1) begin
uut.system_i.mem_sim_axi_slave_0.mem_sim_axi_slave_0.MEMORY_GEN[3].memory_8bit_i.mem[i] = 8'd0;
end
end
initial begin : memory_init_red
integer i;
for (i=0; i<480000; i=i+1) begin
uut.system_i.mem_sim_axi_slave_0.mem_sim_axi_slave_0.MEMORY_GEN[2].memory_8bit_i.mem[i] = mseq8r;
mseq8r = mseqf8_R(mseq8r);
end
end
initial begin : memory_init_green
integer i;
for (i=0; i<480000; i=i+1) begin
uut.system_i.mem_sim_axi_slave_0.mem_sim_axi_slave_0.MEMORY_GEN[1].memory_8bit_i.mem[i] = mseq8g;
mseq8g = mseqf8_G(mseq8g);
end
end
initial begin : memory_init_blue
integer i;
for (i=0; i<480000; i=i+1) begin
uut.system_i.mem_sim_axi_slave_0.mem_sim_axi_slave_0.MEMORY_GEN[0].memory_8bit_i.mem[i] = mseq8b;
mseq8b = mseqf8_B(mseq8b);
end
end
・string で宣言してある行をコメントアウト
・int 宣言を integer 宣言に変更
・2048Mb_ddr3_parameters.vh の ceil()を削除
================================================================
== Vivado HLS Report for 'lap_filter_axim'
================================================================
* Date: Wed Feb 05 06:31:08 2014
* Version: 2013.4 (build date: Mon Dec 09 17:07:59 PM 2013)
* Project: lap_filter_axim_2013_4
* Solution: solution1
* Product family: zynq zynq_fpv6
* Target device: xc7z020clg484-1
================================================================
== Performance Estimates
================================================================
+ Timing (ns):
* Summary:
+---------+-------+----------+------------+
| Clock | Target| Estimated| Uncertainty|
+---------+-------+----------+------------+
|default | 10.00| 8.75| 1.25|
+---------+-------+----------+------------+
+ Latency (clock cycles):
* Summary:
+---------+------------+---------+------------+---------+
| Latency | Interval | Pipeline|
| min | max | min | max | Type |
+---------+------------+---------+------------+---------+
| 1450201| 6942730201| 1450202| 6942730202| none |
+---------+------------+---------+------------+---------+
+ Detail:
* Instance:
N/A
* Loop:
+---------------------+---------+------------+-----------------+-----------+-----------+------+----------+
| | Latency | Iteration | Initiation Interval | Trip | |
| Loop Name | min | max | Latency | achieved | target | Count| Pipelined|
+---------------------+---------+------------+-----------------+-----------+-----------+------+----------+
|- Loop 1 | 1450200| 6942730200| 2417 ~ 11571217 | -| -| 600| no |
| + Loop 1.1 | 1600| 11570400| 2 ~ 14463 | -| -| 800| no |
| ++ Loop 1.1.1 | 14451| 14451| 4817| -| -| 3| no |
| +++ Loop 1.1.1.1 | 814| 814| 16| 1| 1| 800| yes |
| +++ Loop 1.1.1.2 | 4000| 4000| 5| -| -| 800| no |
| ++ Loop 1.1.2 | 814| 814| 16| 1| 1| 800| yes |
| ++ Loop 1.1.3 | 4800| 4800| 6| -| -| 800| no |
| + Loop 1.2 | 801| 801| 3| 1| 1| 800| yes |
+---------------------+---------+------------+-----------------+-----------+-----------+------+----------+
================================================================
== Utilization Estimates
================================================================
* Summary:
+-----------------+---------+-------+--------+-------+
| Name | BRAM_18K| DSP48E| FF | LUT |
+-----------------+---------+-------+--------+-------+
|Expression | -| 14| 0| 905|
|FIFO | -| -| -| -|
|Instance | -| 2| 960| 952|
|Memory | 10| -| 0| 0|
|Multiplexer | -| -| -| 281|
|Register | -| -| 1001| -|
|ShiftMemory | -| -| 0| 8|
+-----------------+---------+-------+--------+-------+
|Total | 10| 16| 1961| 2146|
+-----------------+---------+-------+--------+-------+
|Available | 280| 220| 106400| 53200|
+-----------------+---------+-------+--------+-------+
|Utilization (%) | 3| 7| 1| 4|
+-----------------+---------+-------+--------+-------+
+ Detail:
* Instance:
+-----------------------------------------+--------------------------------------+---------+-------+-----+-----+
| Instance | Module | BRAM_18K| DSP48E| FF | LUT |
+-----------------------------------------+--------------------------------------+---------+-------+-----+-----+
|lap_filter_axim_mul_8ns_7ns_15_3_U4 |lap_filter_axim_mul_8ns_7ns_15_3 | 0| 1| 0| 0|
|lap_filter_axim_mul_8ns_7ns_15_3_U6 |lap_filter_axim_mul_8ns_7ns_15_3 | 0| 1| 0| 0|
|lap_filter_axim_srem_11ns_11ns_11_14_U0 |lap_filter_axim_srem_11ns_11ns_11_14 | 0| 0| 110| 130|
|lap_filter_axim_urem_10ns_10ns_10_13_U1 |lap_filter_axim_urem_10ns_10ns_10_13 | 0| 0| 110| 130|
|lap_filter_axim_urem_10ns_10ns_10_13_U2 |lap_filter_axim_urem_10ns_10ns_10_13 | 0| 0| 110| 130|
|lap_filter_axim_urem_12ns_12ns_12_15_U3 |lap_filter_axim_urem_12ns_12ns_12_15 | 0| 0| 315| 281|
|lap_filter_axim_urem_12ns_12ns_12_15_U5 |lap_filter_axim_urem_12ns_12ns_12_15 | 0| 0| 315| 281|
+-----------------------------------------+--------------------------------------+---------+-------+-----+-----+
|Total | | 0| 2| 960| 952|
+-----------------------------------------+--------------------------------------+---------+-------+-----+-----+
* Memory:
+------------+--------------------------+---------+------+-----+------+-------------+
| Memory | Module | BRAM_18K| Words| Bits| Banks| W*Bits*Banks|
+------------+--------------------------+---------+------+-----+------+-------------+
|lap_buf_U |lap_filter_axim_lap_buf | 2| 800| 24| 1| 19200|
|line_buf_U |lap_filter_axim_line_buf | 8| 2400| 32| 1| 76800|
+------------+--------------------------+---------+------+-----+------+-------------+
|Total | | 10| 3200| 56| 2| 96000|
+------------+--------------------------+---------+------+-----+------+-------------+
* FIFO:
N/A
* Shift register:
+--------------------+---+----+-----+-----------+
| Name | FF| LUT| Bits| Const Bits|
+--------------------+---+----+-----+-----------+
|exitcond1_reg_1538 | 0| 1| 1| 0|
|exitcond7_reg_1434 | 0| 1| 1| 0|
|tmp_39_reg_1453 | 0| 3| 3| 0|
|tmp_43_reg_1556 | 0| 3| 3| 0|
+--------------------+---+----+-----+-----------+
|Total | 0| 8| 8| 0|
+--------------------+---+----+-----+-----------+
* Expression:
+--------------------------+----------+-------+---+----+------------+------------+
| Variable Name | Operation| DSP48E| FF| LUT| Bitwidth P0| Bitwidth P1|
+--------------------------+----------+-------+---+----+------------+------------+
|mul1_fu_717_p2 | * | 1| 0| 0| 12| 13|
|mul_fu_940_p2 | * | 1| 0| 0| 12| 13|
|p_addr10_fu_789_p2 | * | 1| 0| 0| 11| 10|
|p_addr16_fu_1113_p2 | * | 1| 0| 0| 10| 10|
|p_addr3_fu_774_p2 | * | 1| 0| 0| 10| 10|
|p_addr6_fu_965_p2 | * | 1| 0| 0| 3| 10|
|p_addr7_fu_1152_p2 | * | 1| 0| 0| 10| 10|
|p_addr_fu_736_p2 | * | 1| 0| 0| 3| 10|
|tmp_2_fu_598_p2 | * | 1| 0| 0| 10| 10|
|tmp_35_i1_fu_826_p2 | * | 1| 0| 0| 8| 8|
|tmp_35_i_fu_1038_p2 | * | 1| 0| 0| 8| 8|
|tmp_36_i1_fu_816_p2 | * | 1| 0| 0| 8| 5|
|tmp_36_i_fu_1028_p2 | * | 1| 0| 0| 8| 5|
|y_i44_op_cast_fu_1297_p2 | * | 1| 0| 1| 24| 17|
|a_1_fu_883_p2 | + | 0| 0| 2| 2| 1|
|b_2_fu_990_p2 | + | 0| 0| 10| 10| 1|
|b_fu_761_p2 | + | 0| 0| 10| 10| 1|
|grp_fu_553_p0 | + | 0| 0| 11| 11| 2|
|grp_fu_559_p0 | + | 0| 0| 10| 10| 1|
|grp_fu_708_p0 | + | 0| 0| 12| 12| 12|
|indvar_next1_fu_1320_p2 | + | 0| 0| 10| 10| 1|
|indvar_next2_fu_687_p2 | + | 0| 0| 10| 10| 1|
|indvar_next_fu_914_p2 | + | 0| 0| 10| 10| 1|
|next_mul1_fu_525_p2 | + | 0| 0| 19| 19| 10|
|next_mul2_fu_865_p2 | + | 0| 0| 12| 12| 10|
|next_mul_fu_871_p2 | + | 0| 0| 12| 12| 10|
|p_addr11_fu_1189_p2 | + | 0| 0| 12| 12| 12|
|p_addr12_fu_1086_p2 | + | 0| 0| 13| 13| 13|
|p_addr13_fu_1100_p2 | + | 0| 0| 13| 13| 13|
|p_addr14_fu_1130_p2 | + | 0| 0| 13| 13| 13|
|p_addr15_fu_1179_p2 | + | 0| 0| 12| 12| 12|
|p_addr17_fu_1140_p2 | + | 0| 0| 13| 13| 13|
|p_addr18_fu_1000_p2 | + | 0| 0| 12| 12| 12|
|p_addr1_fu_746_p2 | + | 0| 0| 13| 13| 13|
|p_addr2_fu_1208_p2 | + | 0| 0| 12| 12| 12|
|p_addr5_fu_1203_p2 | + | 0| 0| 12| 12| 12|
|p_addr8_fu_1199_p2 | + | 0| 0| 13| 13| 13|
|p_addr9_fu_975_p2 | + | 0| 0| 13| 13| 13|
|p_sum1_fu_583_p2 | + | 0| 0| 33| 33| 33|
|p_sum2_fu_893_p2 | + | 0| 0| 33| 33| 33|
|p_sum_fu_666_p2 | + | 0| 0| 33| 33| 33|
|sum3_i_fu_1242_p2 | + | 0| 0| 32| 32| 32|
|tmp3_fu_1166_p2 | + | 0| 0| 32| 32| 32|
|tmp4_fu_1226_p2 | + | 0| 0| 32| 32| 32|
|tmp5_fu_1221_p2 | + | 0| 0| 32| 32| 32|
|tmp_15_fu_930_p2 | + | 0| 0| 12| 12| 12|
|tmp_s_fu_1077_p2 | + | 0| 0| 11| 11| 2|
|x_1_fu_610_p2 | + | 0| 0| 10| 10| 1|
|tmp_38_i_fu_1252_p2 | - | 0| 0| 32| 32| 32|
|tmp_39_i_fu_1258_p2 | - | 0| 0| 32| 32| 32|
|tmp_i2_fu_1246_p2 | - | 0| 0| 32| 32| 32|
|y_3_fu_1263_p2 | - | 0| 0| 32| 32| 32|
|phitmp_fu_1302_p3 | Select | 0| 0| 24| 1| 2|
|ap_sig_bdd_131 | and | 0| 0| 1| 1| 1|
|ap_sig_bdd_174 | and | 0| 0| 1| 1| 1|
|ap_sig_bdd_520 | and | 0| 0| 1| 1| 1|
|exitcond1_fu_908_p2 | icmp | 0| 0| 11| 10| 9|
|exitcond2_fu_1314_p2 | icmp | 0| 0| 11| 10| 9|
|exitcond3_fu_984_p2 | icmp | 0| 0| 11| 10| 9|
|exitcond4_fu_877_p2 | icmp | 0| 0| 2| 2| 2|
|exitcond5_fu_604_p2 | icmp | 0| 0| 11| 10| 9|
|exitcond6_fu_531_p2 | icmp | 0| 0| 11| 10| 10|
|exitcond7_fu_681_p2 | icmp | 0| 0| 11| 10| 9|
|exitcond_fu_755_p2 | icmp | 0| 0| 11| 10| 9|
|icmp_fu_1287_p2 | icmp | 0| 0| 30| 24| 1|
|isIter0_fu_924_p2 | icmp | 0| 0| 11| 10| 1|
|isIter1_fu_697_p2 | icmp | 0| 0| 11| 10| 1|
|isIter_fu_1331_p2 | icmp | 0| 0| 11| 10| 1|
|tmp_16_fu_638_p2 | icmp | 0| 0| 11| 10| 9|
|tmp_17_fu_644_p2 | icmp | 0| 0| 11| 10| 1|
|tmp_5_fu_656_p2 | icmp | 0| 0| 11| 10| 1|
|tmp_6_fu_626_p2 | icmp | 0| 0| 11| 10| 1|
|tmp_9_fu_574_p2 | icmp | 0| 0| 11| 10| 1|
|tmp_fu_620_p2 | icmp | 0| 0| 11| 10| 10|
|tmp_26_fu_650_p2 | or | 0| 0| 1| 1| 1|
|tmp_8_fu_632_p2 | or | 0| 0| 1| 1| 1|
+--------------------------+----------+-------+---+----+------------+------------+
|Total | | 14| 0| 905| 996| 811|
+--------------------------+----------+-------+---+----+------------+------------+
* Multiplexer:
+-----------------------+----+-----------+-----+-----------+
| Name | LUT| Input Size| Bits| Total Bits|
+-----------------------+----+-----------+-----+-----------+
|a_reg_368 | 2| 2| 2| 4|
|b1_reg_414 | 10| 2| 10| 20|
|b_1_reg_357 | 10| 2| 10| 20|
|cam_fb_address | 32| 3| 32| 96|
|indvar1_reg_443 | 10| 2| 10| 20|
|indvar9_reg_346 | 10| 2| 10| 20|
|indvar_reg_403 | 10| 2| 10| 20|
|lap_buf_address0 | 10| 3| 10| 30|
|lap_fil_val_1_reg_425 | 24| 2| 24| 48|
|line_buf_address0 | 24| 11| 12| 132|
|line_buf_address1 | 12| 6| 12| 72|
|line_buf_d0 | 32| 4| 32| 128|
|phi_mul1_reg_322 | 19| 2| 19| 38|
|phi_mul2_reg_391 | 12| 2| 12| 24|
|phi_mul_reg_379 | 12| 2| 12| 24|
|reg_484 | 32| 2| 32| 64|
|x_reg_334 | 10| 2| 10| 20|
|y_reg_310 | 10| 2| 10| 20|
+-----------------------+----+-----------+-----+-----------+
|Total | 281| 53| 269| 800|
+-----------------------+----+-----------+-----+-----------+
* Register:
+-----------------------------------------+----+-----+-----------+
| Name | FF | Bits| Const Bits|
+-----------------------------------------+----+-----+-----------+
|a_1_reg_1527 | 2| 2| 0|
|a_reg_368 | 2| 2| 0|
|ap_CS_fsm | 6| 6| 0|
|ap_reg_ppiten_pp0_it0 | 1| 1| 0|
|ap_reg_ppiten_pp0_it1 | 1| 1| 0|
|ap_reg_ppiten_pp0_it10 | 1| 1| 0|
|ap_reg_ppiten_pp0_it11 | 1| 1| 0|
|ap_reg_ppiten_pp0_it12 | 1| 1| 0|
|ap_reg_ppiten_pp0_it13 | 1| 1| 0|
|ap_reg_ppiten_pp0_it14 | 1| 1| 0|
|ap_reg_ppiten_pp0_it15 | 1| 1| 0|
|ap_reg_ppiten_pp0_it2 | 1| 1| 0|
|ap_reg_ppiten_pp0_it3 | 1| 1| 0|
|ap_reg_ppiten_pp0_it4 | 1| 1| 0|
|ap_reg_ppiten_pp0_it5 | 1| 1| 0|
|ap_reg_ppiten_pp0_it6 | 1| 1| 0|
|ap_reg_ppiten_pp0_it7 | 1| 1| 0|
|ap_reg_ppiten_pp0_it8 | 1| 1| 0|
|ap_reg_ppiten_pp0_it9 | 1| 1| 0|
|ap_reg_ppiten_pp1_it0 | 1| 1| 0|
|ap_reg_ppiten_pp1_it1 | 1| 1| 0|
|ap_reg_ppiten_pp1_it10 | 1| 1| 0|
|ap_reg_ppiten_pp1_it11 | 1| 1| 0|
|ap_reg_ppiten_pp1_it12 | 1| 1| 0|
|ap_reg_ppiten_pp1_it13 | 1| 1| 0|
|ap_reg_ppiten_pp1_it14 | 1| 1| 0|
|ap_reg_ppiten_pp1_it15 | 1| 1| 0|
|ap_reg_ppiten_pp1_it2 | 1| 1| 0|
|ap_reg_ppiten_pp1_it3 | 1| 1| 0|
|ap_reg_ppiten_pp1_it4 | 1| 1| 0|
|ap_reg_ppiten_pp1_it5 | 1| 1| 0|
|ap_reg_ppiten_pp1_it6 | 1| 1| 0|
|ap_reg_ppiten_pp1_it7 | 1| 1| 0|
|ap_reg_ppiten_pp1_it8 | 1| 1| 0|
|ap_reg_ppiten_pp1_it9 | 1| 1| 0|
|ap_reg_ppiten_pp2_it0 | 1| 1| 0|
|ap_reg_ppiten_pp2_it1 | 1| 1| 0|
|ap_reg_ppiten_pp2_it2 | 1| 1| 0|
|ap_reg_ppstg_exitcond2_reg_1730_pp2_it1 | 1| 1| 0|
|ap_reg_ppstg_isIter_reg_1744_pp2_it1 | 1| 1| 0|
|b1_reg_414 | 10| 10| 0|
|b_1_reg_357 | 10| 10| 0|
|b_2_reg_1574 | 10| 10| 0|
|b_3_reg_1493 | 8| 8| 0|
|b_4_reg_1584 | 8| 8| 0|
|b_reg_1471 | 10| 10| 0|
|cam_fb_addr_1_reg_1532 | 32| 32| 0|
|cam_fb_addr_reg_1393 | 32| 32| 0|
|exitcond1_reg_1538 | 1| 1| 0|
|exitcond2_reg_1730 | 1| 1| 0|
|exitcond4_reg_1523 | 1| 1| 0|
|exitcond7_reg_1434 | 1| 1| 0|
|fl_reg_1379 | 11| 11| 0|
|icmp_reg_1715 | 1| 1| 0|
|indvar1_reg_443 | 10| 10| 0|
|indvar9_reg_346 | 10| 10| 0|
|indvar_reg_403 | 10| 10| 0|
|isIter0_reg_1547 | 1| 1| 0|
|isIter1_reg_1443 | 1| 1| 0|
|isIter_reg_1744 | 1| 1| 0|
|lap_buf_load_reg_1748 | 24| 24| 0|
|lap_fb_addr_reg_1429 | 32| 32| 0|
|lap_fil_val_1_reg_425 | 24| 24| 0|
|line_buf_addr_11_reg_1579 | 12| 12| 0|
|line_buf_addr_2_reg_1488 | 12| 12| 0|
|line_buf_load_4_reg_1657 | 32| 32| 0|
|next_mul1_reg_1352 | 19| 19| 0|
|next_mul2_reg_1513 | 12| 12| 0|
|next_mul_reg_1518 | 12| 12| 0|
|p_addr10_reg_1481 | 8| 13| 5|
|p_addr1_reg_1463 | 13| 13| 0|
|p_addr2_reg_1682 | 12| 12| 0|
|p_addr4_reg_1476 | 12| 12| 0|
|p_addr5_reg_1677 | 12| 12| 0|
|p_addr6_reg_1561 | 8| 13| 5|
|p_addr8_reg_1672 | 13| 13| 0|
|p_addr9_reg_1566 | 13| 13| 0|
|p_addr_reg_1458 | 8| 13| 5|
|phi_mul1_reg_322 | 19| 19| 0|
|phi_mul2_reg_391 | 12| 12| 0|
|phi_mul_reg_379 | 12| 12| 0|
|phitmp_reg_1725 | 24| 24| 0|
|reg_475 | 32| 32| 0|
|reg_480 | 8| 8| 0|
|reg_484 | 32| 32| 0|
|sl_reg_1384 | 10| 10| 0|
|tl_reg_1372 | 10| 10| 0|
|tmp3_reg_1652 | 32| 32| 0|
|tmp4_reg_1697 | 32| 32| 0|
|tmp_10_reg_1447 | 12| 12| 0|
|tmp_15_trn_cast_reg_1604 | 13| 13| 0|
|tmp_2_reg_1399 | 7| 12| 5|
|tmp_30_reg_1620 | 7| 12| 5|
|tmp_33_reg_1626 | 8| 13| 5|
|tmp_34_reg_1641 | 7| 12| 5|
|tmp_35_reg_1647 | 8| 13| 5|
|tmp_36_i1_reg_1503 | 14| 14| 0|
|tmp_36_i_reg_1594 | 14| 14| 0|
|tmp_38_i_reg_1707 | 32| 32| 0|
|tmp_39_reg_1453 | 3| 3| 0|
|tmp_41_reg_1720 | 24| 24| 0|
|tmp_43_reg_1556 | 3| 3| 0|
|tmp_4_cast_reg_1341 | 32| 33| 1|
|tmp_5_cast_reg_1347 | 32| 33| 1|
|tmp_5_reg_1425 | 1| 1| 0|
|tmp_9_reg_1389 | 1| 1| 0|
|x_1_reg_1407 | 10| 10| 0|
|x_cast_reg_1414 | 10| 11| 1|
|x_reg_334 | 10| 10| 0|
|y_1_reg_1361 | 10| 10| 0|
|y_2_reg_1508 | 8| 8| 0|
|y_4_reg_1599 | 8| 8| 0|
|y_reg_310 | 10| 10| 0|
+-----------------------------------------+----+-----+-----------+
|Total |1001| 1044| 43|
+-----------------------------------------+----+-----+-----------+
================================================================
== Interface
================================================================
* Summary:
+--------------------+-----+-----+------------+-----------------+--------------+
| RTL Ports | Dir | Bits| Protocol | Source Object | C Type |
+--------------------+-----+-----+------------+-----------------+--------------+
|ap_clk | in | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_rst | in | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_start | in | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_done | out | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_idle | out | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_ready | out | 1| ap_ctrl_hs | lap_filter_axim | return value |
|ap_return | out | 32| ap_ctrl_hs | lap_filter_axim | return value |
|cam_addr | in | 32| ap_none | cam_addr | scalar |
|lap_addr | in | 32| ap_none | lap_addr | scalar |
|cam_fb_req_din | out | 1| ap_bus | cam_fb | pointer |
|cam_fb_req_full_n | in | 1| ap_bus | cam_fb | pointer |
|cam_fb_req_write | out | 1| ap_bus | cam_fb | pointer |
|cam_fb_rsp_empty_n | in | 1| ap_bus | cam_fb | pointer |
|cam_fb_rsp_read | out | 1| ap_bus | cam_fb | pointer |
|cam_fb_address | out | 32| ap_bus | cam_fb | pointer |
|cam_fb_datain | in | 32| ap_bus | cam_fb | pointer |
|cam_fb_dataout | out | 32| ap_bus | cam_fb | pointer |
|cam_fb_size | out | 32| ap_bus | cam_fb | pointer |
|lap_fb_req_din | out | 1| ap_bus | lap_fb | pointer |
|lap_fb_req_full_n | in | 1| ap_bus | lap_fb | pointer |
|lap_fb_req_write | out | 1| ap_bus | lap_fb | pointer |
|lap_fb_rsp_empty_n | in | 1| ap_bus | lap_fb | pointer |
|lap_fb_rsp_read | out | 1| ap_bus | lap_fb | pointer |
|lap_fb_address | out | 32| ap_bus | lap_fb | pointer |
|lap_fb_datain | in | 32| ap_bus | lap_fb | pointer |
|lap_fb_dataout | out | 32| ap_bus | lap_fb | pointer |
|lap_fb_size | out | 32| ap_bus | lap_fb | pointer |
+--------------------+-----+-----+------------+-----------------+--------------+
`default_nettype none
module iic_3state_buf(
output wire sda_i,
input wire sda_o,
input wire sda_t,
output wire scl_i,
input wire scl_o,
input wire scl_t,
inout wire sda,
inout wire scl
);
IOBUF scl_iobuf (
.I(scl_o),
.IO(scl),
.O(scl_i),
.T(scl_t)
);
IOBUF sda_iobuf (
.I(sda_o),
.IO(sda),
.O(sda_i),
.T(sda_t)
);
endmodule
`default_nettype wire
| 日 | 月 | 火 | 水 | 木 | 金 | 土 |
|---|---|---|---|---|---|---|
| - | - | - | - | - | - | 1 |
| 2 | 3 | 4 | 5 | 6 | 7 | 8 |
| 9 | 10 | 11 | 12 | 13 | 14 | 15 |
| 16 | 17 | 18 | 19 | 20 | 21 | 22 |
| 23 | 24 | 25 | 26 | 27 | 28 | - |