`default_nettype none
`timescale 100ps / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 2015/10/22
// Design Name: lap_fil_hdl_axim
// Module Name: lap_fil_hdl_axim.v
// Project Name: lap_fil_hdl_axim
// Target Device:
// Tool versions:
// Description:
//
// Verilog Test Fixture created by ISE for module: lap_filter_axim
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
////////////////////////////////////////////////////////////////////////////////
module lap_fil_hdl_axim_tb;
parameter integer C_S_AXI_LITE_ADDR_WIDTH = 9; // Address width of the AXI Lite Interface
parameter integer C_S_AXI_LITE_DATA_WIDTH = 32; // Data width of the AXI Lite Interface
parameter DELAY = 1;
// Inputs
wire s_axi_lite_aclk;
wire ACLK;
wire ARESETN;
reg s_axi_lite_awvalid;
reg [8:0] s_axi_lite_awaddr;
reg s_axi_lite_wvalid;
reg [31:0] s_axi_lite_wdata;
reg [3:0] s_axi_lite_wstrb;
reg s_axi_lite_bready;
reg s_axi_lite_arvalid;
reg [8:0] s_axi_lite_araddr;
reg s_axi_lite_rready;
wire M_AXI_AWREADY;
wire M_AXI_WREADY;
wire [0:0] M_AXI_BID;
wire [1:0] M_AXI_BRESP;
wire [0:0] M_AXI_BUSER;
wire M_AXI_BVALID;
wire M_AXI_ARREADY;
wire [0:0] M_AXI_RID;
wire [31:0] M_AXI_RDATA;
wire [1:0] M_AXI_RRESP;
wire M_AXI_RLAST;
wire [0:0] M_AXI_RUSER;
wire M_AXI_RVALID;
// Outputs
wire s_axi_lite_awready;
wire s_axi_lite_wready;
wire [1:0] s_axi_lite_bresp;
wire s_axi_lite_bvalid;
wire s_axi_lite_arready;
wire s_axi_lite_rvalid;
wire [31:0] s_axi_lite_rdata;
wire [1:0] s_axi_lite_rresp;
wire [0:0] M_AXI_AWID;
wire [31:0] M_AXI_AWADDR;
wire [7:0] M_AXI_AWLEN;
wire [2:0] M_AXI_AWSIZE;
wire [1:0] M_AXI_AWBURST;
wire M_AXI_AWLOCK;
wire [3:0] M_AXI_AWCACHE;
wire [2:0] M_AXI_AWPROT;
wire [3:0] M_AXI_AWQOS;
wire [0:0] M_AXI_AWUSER;
wire M_AXI_AWVALID;
wire [31:0] M_AXI_WDATA;
wire [3:0] M_AXI_WSTRB;
wire M_AXI_WLAST;
wire [0:0] M_AXI_WUSER;
wire M_AXI_WVALID;
wire M_AXI_BREADY;
wire [0:0] M_AXI_ARID;
wire [31:0] M_AXI_ARADDR;
wire [7:0] M_AXI_ARLEN;
wire [2:0] M_AXI_ARSIZE;
wire [1:0] M_AXI_ARBURST;
wire [1:0] M_AXI_ARLOCK;
wire [3:0] M_AXI_ARCACHE;
wire [2:0] M_AXI_ARPROT;
wire [3:0] M_AXI_ARQOS;
wire [0:0] M_AXI_ARUSER;
wire M_AXI_ARVALID;
wire M_AXI_RREADY;
wire interrupt;
wire write_fifo_overflow;
// Instantiate the Unit Under Test (UUT)
lap_fil_hdl_axim # (
.C_S_AXI_LITE_ADDR_WIDTH(C_S_AXI_LITE_ADDR_WIDTH),
.C_S_AXI_LITE_DATA_WIDTH(C_S_AXI_LITE_DATA_WIDTH)
) uut (
.s_axi_lite_aclk(s_axi_lite_aclk),
.M_AXI_ACLK(ACLK),
.ARESETN(ARESETN),
.s_axi_lite_awvalid(s_axi_lite_awvalid),
.s_axi_lite_awready(s_axi_lite_awready),
.s_axi_lite_awaddr(s_axi_lite_awaddr),
.s_axi_lite_wvalid(s_axi_lite_wvalid),
.s_axi_lite_wready(s_axi_lite_wready),
.s_axi_lite_wdata(s_axi_lite_wdata),
.s_axi_lite_wstrb(s_axi_lite_wstrb),
.s_axi_lite_bresp(s_axi_lite_bresp),
.s_axi_lite_bvalid(s_axi_lite_bvalid),
.s_axi_lite_bready(s_axi_lite_bready),
.s_axi_lite_arvalid(s_axi_lite_arvalid),
.s_axi_lite_arready(s_axi_lite_arready),
.s_axi_lite_araddr(s_axi_lite_araddr),
.s_axi_lite_rvalid(s_axi_lite_rvalid),
.s_axi_lite_rready(s_axi_lite_rready),
.s_axi_lite_rdata(s_axi_lite_rdata),
.s_axi_lite_rresp(s_axi_lite_rresp),
.M_AXI_AWID(M_AXI_AWID),
.M_AXI_AWADDR(M_AXI_AWADDR),
.M_AXI_AWLEN(M_AXI_AWLEN),
.M_AXI_AWSIZE(M_AXI_AWSIZE),
.M_AXI_AWBURST(M_AXI_AWBURST),
.M_AXI_AWLOCK(M_AXI_AWLOCK),
.M_AXI_AWCACHE(M_AXI_AWCACHE),
.M_AXI_AWPROT(M_AXI_AWPROT),
.M_AXI_AWQOS(M_AXI_AWQOS),
.M_AXI_AWUSER(M_AXI_AWUSER),
.M_AXI_AWVALID(M_AXI_AWVALID),
.M_AXI_AWREADY(M_AXI_AWREADY),
.M_AXI_WDATA(M_AXI_WDATA),
.M_AXI_WSTRB(M_AXI_WSTRB),
.M_AXI_WLAST(M_AXI_WLAST),
.M_AXI_WUSER(M_AXI_WUSER),
.M_AXI_WVALID(M_AXI_WVALID),
.M_AXI_WREADY(M_AXI_WREADY),
.M_AXI_BID(M_AXI_BID),
.M_AXI_BRESP(M_AXI_BRESP),
.M_AXI_BUSER(M_AXI_BUSER),
.M_AXI_BVALID(M_AXI_BVALID),
.M_AXI_BREADY(M_AXI_BREADY),
.M_AXI_ARID(M_AXI_ARID),
.M_AXI_ARADDR(M_AXI_ARADDR),
.M_AXI_ARLEN(M_AXI_ARLEN),
.M_AXI_ARSIZE(M_AXI_ARSIZE),
.M_AXI_ARBURST(M_AXI_ARBURST),
.M_AXI_ARLOCK(M_AXI_ARLOCK),
.M_AXI_ARCACHE(M_AXI_ARCACHE),
.M_AXI_ARPROT(M_AXI_ARPROT),
.M_AXI_ARQOS(M_AXI_ARQOS),
.M_AXI_ARUSER(M_AXI_ARUSER),
.M_AXI_ARVALID(M_AXI_ARVALID),
.M_AXI_ARREADY(M_AXI_ARREADY),
.M_AXI_RID(M_AXI_RID),
.M_AXI_RDATA(M_AXI_RDATA),
.M_AXI_RRESP(M_AXI_RRESP),
.M_AXI_RLAST(M_AXI_RLAST),
.M_AXI_RUSER(M_AXI_RUSER),
.M_AXI_RVALID(M_AXI_RVALID),
.M_AXI_RREADY(M_AXI_RREADY),
.interrupt(interrupt),
.write_fifo_overflow(write_fifo_overflow)
);
initial begin : initial_state
integer i;
// Initialize Inputs
s_axi_lite_awaddr = 0;
s_axi_lite_awvalid = 0;
s_axi_lite_wvalid = 0;
s_axi_lite_wdata = 0;
s_axi_lite_wvalid = 0;
s_axi_lite_bready = 0;
s_axi_lite_araddr = 0;
s_axi_lite_arvalid = 0;
s_axi_lite_rready = 0;
s_axi_lite_wstrb = 0;
// Wait Reset rising edge
@(posedge ARESETN);
for (i=0; i<10; i=i+1) begin
@(posedge ACLK); // 次のクロックへ
#DELAY;
end
s_axi_lite_wstrb = 4'b1111;
// Add stimulus here
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_0014, 32'h1000_0000); // cam_addr write
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_0010, 32'h0000_0001); // cam_addr_ap_vld = 1
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_001C, 32'h2000_0000); // lap_addr write
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_0018, 32'h0000_0001); // lap_addr_ap_vld = 1
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_0008, 32'h0000_0001); // IP Interrupt Enable Registe(ap_done=1)
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_WADC1(32'h0000_0000, 32'h0000_0001); // ap_start = 1
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_RADC1(32'h0000_0000);
forever begin
@(posedge ACLK); // 次のクロックへ
#DELAY;
AXI_MASTER_RADC1(32'h0000_0000);
end
end
// Write Transcation 1
task AXI_MASTER_WADC1;
input [C_S_AXI_LITE_ADDR_WIDTH-1:0] awaddr;
input [C_S_AXI_LITE_DATA_WIDTH-1:0] wdata;
begin
s_axi_lite_awaddr = awaddr;
s_axi_lite_awvalid = 1'b1;
@(posedge ACLK); // 次のクロックへ
#DELAY;
s_axi_lite_awvalid <= 1'b0;
s_axi_lite_wdata = wdata;
s_axi_lite_wvalid = 1'b1;
@(posedge ACLK); // 次のクロックへ
#DELAY;
s_axi_lite_wvalid = 1'b0;
s_axi_lite_bready = 1'b1;
@(posedge ACLK); // 次のクロックへ
#DELAY;
s_axi_lite_bready = 1'b0;
end
endtask
// Read Transcation 1
task AXI_MASTER_RADC1;
input [31:0] araddr;
begin
s_axi_lite_araddr = araddr;
s_axi_lite_arvalid = 1'b1;
@(posedge ACLK); // 次のクロックへ
#DELAY;
s_axi_lite_araddr = 0;
s_axi_lite_arvalid = 1'b0;
s_axi_lite_rready = 1'b1;
@(posedge ACLK); // 次のクロックへ
#DELAY;
s_axi_lite_rready = 1'b0;
end
endtask
// clk_gen のインスタンス(ACLK)
clk_gen #(
.CLK_PERIOD(100), // 10nsec, 100MHz
.CLK_DUTY_CYCLE(0.5),
.CLK_OFFSET(0),
.START_STATE(1'b0)
) ACLKi (
.clk_out(ACLK)
);
assign s_axi_lite_aclk = ACLK;
// reset_gen のインスタンス
reset_gen #(
.RESET_STATE(1'b0),
.RESET_TIME(1000) // 100nsec
) RESETi (
.reset_out(ARESETN),
.init_done()
);
// Instantiate the Unit Under Test (UUT_slave)
axi_slave_bfm # (
.C_S_AXI_DATA_WIDTH(32),
.WRITE_RANDOM_WAIT(0), // Write Transaction のデータ転送の時にランダムなWaitを発生させる=1, Waitしない=0
.READ_RANDOM_WAIT(0), // Read Transaction のデータ転送の時にランダムなWaitを発生させる=1, Waitしない=0
.READ_DATA_IS_INCREMENT(1), // ReadトランザクションでRAMの内容をReadする = 0(RAMにWriteしたものをReadする)、Readデータを+1する = 1(データは+1したデータをReadデータとして使用する
.RANDOM_BVALID_WAIT(0),
.LOAD_RAM_INIT_FILE(1)
) uut_slave (
.ACLK(ACLK),
.ARESETN(ARESETN),
.S_AXI_AWID(M_AXI_AWID),
.S_AXI_AWADDR(M_AXI_AWADDR),
.S_AXI_AWLEN(M_AXI_AWLEN),
.S_AXI_AWSIZE(M_AXI_AWSIZE),
.S_AXI_AWBURST(M_AXI_AWBURST),
.S_AXI_AWLOCK({1'b0, M_AXI_AWLOCK}),
.S_AXI_AWCACHE(M_AXI_AWCACHE),
.S_AXI_AWPROT(M_AXI_AWPROT),
.S_AXI_AWQOS(M_AXI_AWQOS),
.S_AXI_AWUSER(M_AXI_AWUSER),
.S_AXI_AWVALID(M_AXI_AWVALID),
.S_AXI_AWREADY(M_AXI_AWREADY),
.S_AXI_WDATA(M_AXI_WDATA),
.S_AXI_WSTRB(M_AXI_WSTRB),
.S_AXI_WLAST(M_AXI_WLAST),
.S_AXI_WUSER(M_AXI_WUSER),
.S_AXI_WVALID(M_AXI_WVALID),
.S_AXI_WREADY(M_AXI_WREADY),
.S_AXI_BID(M_AXI_BID),
.S_AXI_BRESP(M_AXI_BRESP),
.S_AXI_BUSER(M_AXI_BUSER),
.S_AXI_BVALID(M_AXI_BVALID),
.S_AXI_BREADY(M_AXI_BREADY),
.S_AXI_ARID(M_AXI_ARID),
.S_AXI_ARADDR(M_AXI_ARADDR),
.S_AXI_ARLEN(M_AXI_ARLEN),
.S_AXI_ARSIZE(M_AXI_ARSIZE),
.S_AXI_ARBURST(M_AXI_ARBURST),
.S_AXI_ARLOCK(M_AXI_ARLOCK),
.S_AXI_ARCACHE(M_AXI_ARCACHE),
.S_AXI_ARPROT(M_AXI_ARPROT),
.S_AXI_ARQOS(M_AXI_ARQOS),
.S_AXI_ARUSER(M_AXI_ARUSER),
.S_AXI_ARVALID(M_AXI_ARVALID),
.S_AXI_ARREADY(M_AXI_ARREADY),
.S_AXI_RID(M_AXI_RID),
.S_AXI_RDATA(M_AXI_RDATA),
.S_AXI_RRESP(M_AXI_RRESP),
.S_AXI_RLAST(M_AXI_RLAST),
.S_AXI_RUSER(M_AXI_RUSER),
.S_AXI_RVALID(M_AXI_RVALID),
.S_AXI_RREADY(M_AXI_RREADY)
);
endmodule
module clk_gen #(
parameter CLK_PERIOD = 100,
parameter real CLK_DUTY_CYCLE = 0.5,
parameter CLK_OFFSET = 0,
parameter START_STATE = 1'b0 )
(
output reg clk_out
);
begin
initial begin
#CLK_OFFSET;
forever
begin
clk_out = START_STATE;
#(CLK_PERIOD-(CLK_PERIOD*CLK_DUTY_CYCLE)) clk_out = ~START_STATE;
#(CLK_PERIOD*CLK_DUTY_CYCLE);
end
end
end
endmodule
module reset_gen #(
parameter RESET_STATE = 1'b1,
parameter RESET_TIME = 100 )
(
output reg reset_out,
output reg init_done
);
begin
initial begin
reset_out = RESET_STATE;
init_done = 1'b0;
#RESET_TIME;
reset_out = ~RESET_STATE;
init_done = 1'b1;
end
end
endmodule
`default_nettype wire
opkg update
opkg upgrade
opkg install opencv
opkg install python-opencv
http://sourceforge.net/projects/roboticscode/files/Face%20Tracker/haarcascade_frontalface_alt.xml/download?use_mirror=jaist&r=http%3A%2F%2Fosdn.jp%2Fprojects%2Fsfnet_roboticscode%2Fdownloads%2FFace%2520Tracker%2Fhaarcascade_frontalface_alt.xml%2F&use_mirror=jaist
http://www.eml.ele.cst.nihon-u.ac.jp/~momma/wiki/wiki.cgi/RSJ2011.html
を実行した。python recognize.py
をやってみた。(VNC の環境がすでに走っている)opkg update
opkg upgrade
cd /etc
mv localtime localtime.orig
ln -s /usr/share/zoneinfo/Asia/Tokyo localtime
0
reading u-boot.scr
903 bytes read in 6 ms (146.5 KiB/s)
## Executing script at 02000000
---Booting ATLAS SOC GHRD---
---Programming FPGA---
reading ATLAS_SOC_GHRD/output_files/ATLAS_SOC_GHRD.rbf
2109256 bytes read in 152 ms (13.2 MiB/s)
---Setting Env variables---
## Starting application at 0x3FF79550 ...
## Application terminated, rc = 0x0
---Generating MAC Address---
ethaddr = 00:07:ed:40:66:10
---Booting Linux---
reading zImage
3975760 bytes read in 269 ms (14.1 MiB/s)
reading zImage-socfpga_cyclone5_de0_sockit.dtb
22711 bytes read in 11 ms (2 MiB/s)
## Flattened Device Tree blob at 00000100
Booting using the fdt blob at 0x00000100
reserving fdt memory region: addr=0 size=1000
Loading Device Tree to 03ff7000, end 03fff8b6 ... OK
Starting kernel ...
Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpuset
Linux version 4.0.0-altera (dwesterg@sj-dwesterg2-ll) (gcc version 4.9.3 20141031 (prerelease) (Linaro GCC 4.9-2014.11) ) #1 SMP Mon Oct 5 07:51:48 PDT 2015
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Terasic DE-0(Atlas)
Memory policy: Data cache writealloc
PERCPU: Embedded 11 pages/cpu @bf7cc000 s15424 r8192 d21440 u45056
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1030632K/1048576K available (6028K kernel code, 254K rwdata, 1792K rodata, 432K init, 197K bss, 17944K reserved, 0K cma-reserved)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xc0800000 - 0xff000000 (1000 MB)
lowmem : 0x80000000 - 0xc0000000 (1024 MB)
modules : 0x7f000000 - 0x80000000 ( 16 MB)
.text : 0x80008000 - 0x807ab448 (7822 kB)
.init : 0x807ac000 - 0x80818000 ( 432 kB)
.data : 0x80818000 - 0x808579d0 ( 255 kB)
.bss : 0x808579d0 - 0x808890a4 ( 198 kB)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.
Additional per-CPU info printed with stalls.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
L2C: platform modifies aux control register: 0x02060000 -> 0x32460000
L2C: platform provided aux values permit register corruption.
L2C: DT/platform modifies aux control register: 0x02060000 -> 0x32460000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410030c9, AUX_CTRL 0x76460001
sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 42949672950ns
Console: colour dummy device 80x30
Calibrating delay loop... 1836.64 BogoMIPS (lpj=9183232)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
ftrace: allocating 20063 entries in 59 pages
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x572258 - 0x5722b0
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (3679.84 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
NET: Registered protocol family 16
fpga bridge driver
DMA: preallocated 256 KiB pool for atomic coherent allocations
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
altera_hps2fpga_bridge soc:fpgabridge@0: fpga bridge [hps2fpga] registered as device hps2fpga
altera_hps2fpga_bridge soc:fpgabridge@0: init-val not specified
altera_hps2fpga_bridge soc:fpgabridge@1: fpga bridge [lwhps2fpga] registered as device lwhps2fpga
altera_hps2fpga_bridge soc:fpgabridge@1: init-val not specified
altera_hps2fpga_bridge soc:fpgabridge@2: fpga bridge [fpga2hps] registered as device fpga2hps
altera_hps2fpga_bridge soc:fpgabridge@2: init-val not specified
FPGA Mangager framework driver
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
Switched to clocksource timer1
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 3, 32768 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP: reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
arm-pmu arm-pmu: PMU:CTI successfully enabled for 2 cores
futex hash table entries: 512 (order: 3, 32768 bytes)
audit: initializing netlink subsys (disabled)
audit: type=2000 audit(0.210:1): initialized
NFS: Registering the id_resolver key type
Key type id_resolver registered
Key type id_legacy registered
ntfs: driver 2.1.31 [Flags: R/W].
jffs2: version 2.2. (NAND) (SUMMARY) c 2001-2006 Red Hat, Inc.
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
io scheduler noop registered (default)
io scheduler deadline registered
io scheduler cfq registered
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
console [ttyS0] disabled
ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 42, base_baud = 6250000) is a 16550A
console [ttyS0] enabled
ffc03000.serial1: ttyS1 at MMIO 0xffc03000 (irq = 43, base_baud = 6250000) is a 16550A
altera_fpga_manager ff706000.fpgamgr: fpga manager [Altera FPGA Manager] registered as minor 0
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
CAN device driver interface
stmmac - user ID: 0x10, Synopsys ID: 0x37
Ring mode enabled
DMA HW capability register supported
Enhanced/Alternate descriptors
Enabled extended descriptors
RX Checksum Offload Engine supported (type 2)
TX Checksum insertion supported
Enable RX Mitigation via HW Watchdog Timer
libphy: stmmac: probed
eth0: PHY ID 00221622 at 1 IRQ POLL (stmmac-0:01) active
dwc2 ffb40000.usb: EPs: 16, dedicated fifos, 8064 entries in SPRAM
dwc2 ffb40000.usb: DWC OTG Controller
dwc2 ffb40000.usb: new USB bus registered, assigned bus number 1
dwc2 ffb40000.usb: irq 44, io mem 0x00000000
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: DWC OTG Controller
usb usb1: Manufacturer: Linux 4.0.0-altera dwc2_hsotg
usb usb1: SerialNumber: ffb40000.usb
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usbcore: registered new interface driver usb-storage
mousedev: PS/2 mouse device common for all mice
input: ADXL34x accelerometer as /devices/platform/soc/ffc04000.i2c/i2c-0/0-0053/input/input0
i2c /dev entries driver
Driver 'mmcblk' needs updating - please use bus_type methods
Synopsys Designware Multimedia Card Interface Driver
dw_mmc ff704000.dwmmc0: IDMAC supports 32-bit address mode.
dw_mmc ff704000.dwmmc0: Using internal DMA controller.
dw_mmc ff704000.dwmmc0: Version ID is 240a
dw_mmc ff704000.dwmmc0: DW MMC controller at irq 32, 32 bit host data width, 1024 deep fifo
dw_mmc ff704000.dwmmc0: No vmmc regulator found
dw_mmc ff704000.dwmmc0: No vqmmc regulator found
dw_mmc ff704000.dwmmc0: 1 slots initialized
platform soc:leds: Driver leds-gpio requests probe deferral
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
oprofile: using arm/armv7-ca9
TCP: cubic registered
NET: Registered protocol family 10
sit: IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
NET: Registered protocol family 15
can: controller area network core (rev 20120528 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20120528)
can: broadcast manager protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
8021q: 802.1Q VLAN Support v1.8
Key type dns_resolver registered
ThumbEE CPU extension supported.
Registering SWP/SWPB emulation handler
platform soc:leds: Driver leds-gpio requests probe deferral
platform soc:keys: Driver gpio-keys requests probe deferral
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
mmc0: new high speed SDHC card at address 0007
mmcblk0: mmc0:0007 SD8GB 7.42 GiB
mmcblk0: p1 p2 p3
platform soc:leds: Driver leds-gpio requests probe deferral
/data/atlas-soc/17-master/setup-scripts/build/tmp-angstrom_v2014_12-glibc/work/atlas_sockit-angstrom-linux-gnueabi/linux-altera/4.0+gitAUTOINC+5d36469775-r15/linux/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
platform soc:leds: Driver leds-gpio requests probe deferral
platform soc:keys: Driver gpio-keys requests probe deferral
ttyS0 - failed to request DMA
random: nonblocking pool is initialized
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
devtmpfs: mounted
Freeing unused kernel memory: 432K (807ac000 - 80818000)
systemd[1]: Failed to insert module 'autofs4'
systemd[1]: systemd 219 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD +IDN)
systemd[1]: Detected architecture arm.
Welcome to The Angstrom Distribution v2014.12!
systemd[1]: Set hostname to <atlas_sockit>.
systemd-sysv-generator[679]: Overwriting existing symlink /run/systemd/generator.late/fuse.service with real service
systemd-sysv-generator[679]: Overwriting existing symlink /run/systemd/generator.late/gator.service with real service
systemd[1]: Cannot add dependency job for unit org.freedesktop.resolve1.busname, ignoring: Unit org.freedesktop.resolve1.busname failed to load: No such file or directory.
systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
systemd[1]: Starting Dispatch Password Requests to Console Directory Watch.
[ OK ] Reached target Swap.
systemd[1]: Reached target Swap.
systemd[1]: Starting Swap.
systemd[1]: Started Forward Password Requests to Wall Directory Watch.
systemd[1]: Starting Forward Password Requests to Wall Directory Watch.
[ OK ] Reached target Paths.
systemd[1]: Reached target Paths.
systemd[1]: Starting Paths.
[ OK ] Created slice Root Slice.
systemd[1]: Created slice Root Slice.
systemd[1]: Starting Root Slice.
[ OK ] Listening on Journal Socket (/dev/log).
systemd[1]: Listening on Journal Socket (/dev/log).
systemd[1]: Starting Journal Socket (/dev/log).
[ OK ] Listening on Syslog Socket.
systemd[1]: Listening on Syslog Socket.
systemd[1]: Starting Syslog Socket.
[ OK ] Created slice System Slice.
systemd[1]: Created slice System Slice.
systemd[1]: Starting System Slice.
[ OK ] Created slice system-getty.slice.
systemd[1]: Created slice system-getty.slice.
systemd[1]: Starting system-getty.slice.
[ OK ] Created slice system-serial\x2dgetty.slice.
systemd[1]: Created slice system-serial\x2dgetty.slice.
systemd[1]: Starting system-serial\x2dgetty.slice.
[ OK ] Listening on Journal Audit Socket.
systemd[1]: Listening on Journal Audit Socket.
systemd[1]: Starting Journal Audit Socket.
[ OK ] Listening on udev Control Socket.
systemd[1]: Listening on udev Control Socket.
systemd[1]: Starting udev Control Socket.
[ OK ] Listening on Journal Socket.
systemd[1]: Listening on Journal Socket.
systemd[1]: Starting Journal Socket.
systemd[1]: Starting Journal Service...
Starting Journal Service...
systemd[1]: Started Bind mount volatile /var/lib.
systemd[1]: Mounting Debug File System...
Mounting Debug File System...
systemd[1]: Started File System Check on Root Device.
systemd[1]: Starting Remount Root and Kernel File Systems...
Starting Remount Root and Kernel File Systems...
[ OK ] Listening on networkd rtnetlink socket.
systemd[1]: Listening on networkd rtnetlink socket.
systemd[1]: Starting networkd rtnetlink socket.
[ OK ] Listening on /dev/initctl Compatibility Named Pipe.
systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
systemd[1]: Starting /dev/initctl Compatibility Named Pipe.
[ OK ] Created slice User and Session Slice.
systemd[1]: Created slice User and Session Slice.
systemd[1]: Starting User and Session Slice.
[ OK ] Reached target Slices.
systemd[1]: Reached target Slices.
systemd[1]: Starting Slices.
systemd[1]: Mounted Huge Pages File System.
[ OK ] Listening on udev Kernel Socket.
systemd[1]: Listening on udev Kernel Socket.
systemd[1]: Starting udev Kernel Socket.
systemd[1]: Starting udev Coldplug all Devices...
Starting udev Coldplug all Devices...
[ OK ] Listening on Delayed Shutdown Socket.
systemd[1]: Listening on Delayed Shutdown Socket.
systemd[1]: Starting Delayed Shutdown Socket.
systemd[1]: Started Load Kernel Modules.
systemd[1]: Mounting Configuration File System...
Mounting Configuration File System...
systemd[1]: Mounted FUSE Control File System.
systemd[1]: Starting Apply Kernel Variables...
Starting Apply Kernel Variables...
systemd[1]: Mounted POSIX Message Queue File System.
systemd[1]: Starting Create list of required static device nodes for the current kernel...
Starting Create list of required st... nodes for the current kernel...
[ OK ] Mounted Debug File System.
systemd[1]: Mounted Debug File System.
[ OK ] Mounted Configuration File System.
systemd[1]: Mounted Configuration File System.
[ OK ] Started Remount Root and Kernel File Systems.
systemd[1]: Started Remount Root and Kernel File Systems.
[ OK ] Started Apply Kernel Variables.
systemd[1]: Started Apply Kernel Variables.
[ OK ] Started Create list of required sta...ce nodes for the current kernel.
systemd[1]: Started Create list of required static device nodes for the current kernel.
[ OK ] Started udev Coldplug all Devices.
systemd[1]: Started udev Coldplug all Devices.
[ OK ] Started Journal Service.
systemd[1]: Started Journal Service.
Starting Load/Save Random Seed...
Starting Create Static Device Nodes in /dev...
Starting Flush Journal to Persistent Storage...
[ OK ] Started Load/Save Random Seed.
systemd-journald[686]: Received request to flush runtime journal from PID 1
[ OK ] Started Create Static Device Nodes in /dev.
Starting udev Kernel Device Manager...
[ OK ] Reached target Local File Systems (Pre).
Mounting /tmp...
[ OK ] Mounted /tmp.
[ OK ] Reached target Local File Systems.
[ OK ] Started Flush Journal to Persistent Storage.
Starting Create Volatile Files and Directories...
[ OK ] Started Create Volatile Files and Directories.
Starting Network Time Synchronization...
Starting Update UTMP about System Boot/Shutdown...
[ OK ] Started udev Kernel Device Manager.
[ OK ] Started Network Time Synchronization.
[ OK ] Reached target System Time Synchronized.
[ OK ] Started Update UTMP about System Boot/Shutdown.
platform soc:leds: Driver leds-gpio requests probe deferral
platform soc:keys: Driver gpio-keys requests probe deferral
[ OK ] Found device /dev/ttyS0.
platform soc:leds: Driver leds-gpio requests probe deferral
platform soc:keys: Driver gpio-keys requests probe deferral
[ OK ] Reached target System Initialization.
ff202000.serial: ttyJ0 at MMIO 0xff202000 (irq = 46, base_baud = 0) is a Altera JTAG UART
input: soc:keys as /devices/platform/soc/soc:keys/input/input1
[ OK ] Listening on RPCbind Server Activation Socket.
Starting Console System Startup Logging...
[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
[ OK ] Listening on D-Bus System Message Bus Socket.
[ OK ] Reached target Timers.
[ OK ] Started Console System Startup Logging.
[ OK ] Listening on sshd.socket.
[ OK ] Reached target Sockets.
[ OK ] Reached target Basic System.
[ OK ] Started Atlas X11VNC server.
Starting Atlas X11VNC server...
[ OK ] Started Timestamping service.
Starting Timestamping service...
Starting LSB: Starts gatord...
[ OK ] Started Start usb mass storage gadget.
Starting Start usb mass storage gadget...
Starting Avahi mDNS/DNS-SD Stack...
[ OK ] Started System Logging Service.
Starting System Logging Service...
[ OK ] Started Periodic Command Scheduler.
Starting Periodic Command Scheduler...
using random self ethernet address
using random host ethernet address
Starting Connection service...
[ OK ] Started Atlas SoC fftsw init.
Number of LUNs=8
Mass Storage Function, version: 2009/09/11
LUN: removable file: (no medium)
Number of LUNs=1
LUN: file: /usr/share/atlas-soc-usb-gadget/fat_image.img
Number of LUNs=1
usb0: HOST MAC 5e:2e:5a:42:93:28
usb0: MAC 4a:f9:21:8a:b6:22
g_multi gadget: Multifunction Composite Gadget
g_multi gadget: userspace failed to provide iSerialNumber
g_multi gadget: g_multi ready
dwc2 ffb40000.usb: bound driver g_multi
Starting Atlas SoC fftsw init...
Starting Network Time Service (one-shot ntpdate mode)...
[ OK ] Started D-Bus System Message Bus.
gator: perf pmu: armv7_cortex_a9
gator: Adding cpu counters for ARMv7_Cortex_A9 with type 6
dwc2 ffb40000.usb: new device is high-speed
[ OK ] Started Avahi mDNS/DNS-SD Stack.
Starting D-Bus System Message Bus...
Starting Network Service...
Starting Login Service...
[ OK ] Started Kernel Logging Service.
Starting Kernel Logging Service...
[ OK ] Started LSB: Starts gatord.
dwc2 ffb40000.usb: new device is high-speed
[ OK ] Started Network Time Service (one-shot ntpdate mode).
[ OK ] Started Network Service.
[ OK ] Found device /dev/ttyGS0.
dwc2 ffb40000.usb: new address 1
[ OK ] Started Connection service.
[ OK ] Started Login Service.
g_multi gadget: high-speed config #1: Multifunction with RNDIS
[ OK ] Reached target Remote File Systems.
Starting Permit User Sessions...
[ OK ] Reached target Network.
Starting Samba NMB Daemon...
Starting Lightning Fast Webserver With Light System Requirements...
Starting Network Name Resolution...
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
[ OK ] Started Permit User Sessions.
[ OK ] Started Serial Getty on ttyS0.
Starting Serial Getty on ttyS0...
[ OK ] Started Serial Getty on ttyGS0.
Starting Serial Getty on ttyGS0...
[ OK ] Started Getty on tty1.
Starting Getty on tty1...
[ OK ] Reached target Login Prompts.
[ OK ] Started Network Name Resolution.
[ OK ] Started Lightning Fast Webserver With Light System Requirements.
Starting WPA supplicant...
[ OK ] Started Samba NMB Daemon.
Starting Samba SMB Daemon...
[ OK ] Started WPA supplicant.
[ OK ] Started Samba SMB Daemon.
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
[ OK ] Reached target Multi-User System.
Starting Update UTMP about System Runlevel Changes...
[ OK ] Started Update UTMP about System Runlevel Changes.
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
.---O---.
| | .-. o o
| | |-----.-----.-----.| | .----..-----.-----.
| | | __ | ---'| '--.| .-'| | |
| | | | | |--- || --'| | | ' | | | |
'---'---'--'--'--. |-----''----''--' '-----'-'-'-'
-' |
'---'
The Angstrom Distribution atlas_sockit ttyS0
Angstrom v2014.12 - Kernel 4.0.0-altera
atlas_sockit login: stmmaceth ff702000.ethernet eth0: Link is Up - 100Mbps/Full - flow control off
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 1)
dwc2 ffb40000.usb: s3c_hsotg_start_req: ep5 is stalled
dwc2 ffb40000.usb: s3c_hsotg_ep_sethalt(ep be9c5690 ep5in, 0)
root@socfpga:~# dmesg
Booting Linux on physical CPU 0x0
Initializing cgroup subsys cpuset
Linux version 3.13.0-00298-g3c7cbb9-dirty (root@matthew) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) ) #8 SMP Wed Jan 7 10:48:09 CST 2015
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Altera SOCFPGA Cyclone V SoC Development Kit
cma: dma_contiguous_reserve(limit 40000000)
cma: dma_contiguous_reserve: reserving 512 MiB for global area
cma: dma_contiguous_reserve_area(size 20000000, base 00000000, limit 40000000)
cma: CMA: reserved 512 MiB at 20000000
Memory policy: Data cache writealloc
On node 0 totalpages: 262144
free_area_init_node: node 0, pgdat 80813340, node_mem_map 8085a000
Normal zone: 2048 pages used for memmap
Normal zone: 0 pages reserved
Normal zone: 262144 pages, LIFO batch:31
PERCPU: Embedded 8 pages/cpu @81067000 s11264 r8192 d13312 u32768
pcpu-alloc: s11264 r8192 d13312 u32768 alloc=8*4096
pcpu-alloc: [0] 0 [0] 1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260096
Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 505572K/1048576K available (6096K kernel code, 263K rwdata, 1512K rodata, 375K init, 261K bss, 543004K reserved)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xc0800000 - 0xff000000 (1000 MB)
lowmem : 0x80000000 - 0xc0000000 (1024 MB)
modules : 0x7f000000 - 0x80000000 ( 16 MB)
.text : 0x80008000 - 0x80776570 (7610 kB)
.init : 0x80777000 - 0x807d4c00 ( 375 kB)
.data : 0x807d6000 - 0x80817ff8 ( 264 kB)
.bss : 0x80817ff8 - 0x80859434 ( 262 kB)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
Hierarchical RCU implementation.
NR_IRQS:16 nr_irqs:16 16
sched_clock: 32 bits at 100MHz, resolution 10ns, wraps every 42949672950ns
Console: colour dummy device 80x30
Calibrating delay loop... 1836.64 BogoMIPS (lpj=9183232)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
ftrace: allocating 19140 entries in 57 pages
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x58a5b8 - 0x58a610
CPU1: Booted secondary processor
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated.
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
NET: Registered protocol family 16
fpga bridge driver
cma: dma_alloc_from_contiguous(cma 8084c62c, count 64, align 6)
cma: dma_alloc_from_contiguous(): returned 80c5a000
DMA: preallocated 256 KiB pool for atomic coherent allocations
L310 cache controller enabled
l2x0: 8 ways, CACHE_ID 0x410030c9, AUX_CTRL 0x32460000, Cache size: 512 kB
syscon fffef000.l2-cache: regmap [mem 0xfffef000-0xfffeffff] registered
syscon ffd05000.rstmgr: regmap [mem 0xffd05000-0xffd05fff] registered
syscon ffc25000.sdrctl: regmap [mem 0xffc25000-0xffc25fff] registered
syscon ff800000.l3regs: regmap [mem 0xff800000-0xff800fff] registered
syscon ffd08000.sysmgr: regmap [mem 0xffd08000-0xffd0bfff] registered
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
altera_hps2fpga_bridge fpgabridge.2: fpga bridge [hps2fpga] registered as device hps2fpga
altera_hps2fpga_bridge fpgabridge.2: init-val not specified
altera_hps2fpga_bridge fpgabridge.3: fpga bridge [lshps2fpga] registered as device lwhps2fpga
altera_hps2fpga_bridge fpgabridge.3: init-val not specified
altera_hps2fpga_bridge fpgabridge.4: fpga bridge [fpga2hps] registered as device fpga2hps
altera_hps2fpga_bridge fpgabridge.4: init-val not specified
bio: create slabat 0
FPGA Mangager framework driver
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti
PTP clock support registered
Bluetooth: Core ver 2.17
NET: Registered protocol family 31
Bluetooth: HCI device and connection manager initialized
Bluetooth: HCI socket layer initialized
Bluetooth: L2CAP socket layer initialized
Bluetooth: SCO socket layer initialized
Switched to clocksource timer1
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 3, 32768 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP: reno registered
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
arm-pmu arm-pmu: PMU:CTI successfully enabled for 2 cores
NFS: Registering the id_resolver key type
Key type id_resolver registered
Key type id_legacy registered
NTFS driver 2.1.30 [Flags: R/W].
jffs2: version 2.2. (NAND) \xffffffc2\xffffffa9 2001-2006 Red Hat, Inc.
msgmni has been set to 2011
io scheduler noop registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 194, base_baud = 6250000) is a 16550A
console [ttyS0] enabled
altera_fpga_manager ff706000.fpgamgr: fpga manager [Altera FPGA Manager] registered as minor 0
brd: module loaded
dw_spi_mmio fff01000.spi: master is unqueued, this is deprecated
CAN device driver interface
c_can_platform ffc00000.d_can: invalid resource
c_can_platform ffc00000.d_can: control memory is not used for raminit
c_can_platform ffc00000.d_can: c_can_platform device registered (regs=c089e000, irq=163)
stmmac - user ID: 0x10, Synopsys ID: 0x37
Ring mode enabled
DMA HW capability register supported
Enhanced/Alternate descriptors
Enabled extended descriptors
RX Checksum Offload Engine supported (type 2)
TX Checksum insertion supported
Enable RX Mitigation via HW Watchdog Timer
libphy: stmmac: probed
eth0: PHY ID 00221622 at 1 IRQ POLL (stmmac-0:01) active
dwc2 ffb40000.usb: unable to find phy
dwc2 ffb40000.usb: EPs:15
dwc2 ffb40000.usb: dedicated fifos
dwc2 ffb40000.usb: 2560 invalid for host_rx_fifo_size. Check HW configuration.
dwc2 ffb40000.usb: 2560 invalid for host_nperio_tx_fifo_size. Check HW configuration.
cma: dma_alloc_from_contiguous(cma 8084c62c, count 1, align 0)
cma: dma_alloc_from_contiguous(): returned 80c5a800
dwc2 ffb40000.usb: DWC OTG Controller
dwc2 ffb40000.usb: new USB bus registered, assigned bus number 1
dwc2 ffb40000.usb: irq 160, io mem 0x00000000
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: DWC OTG Controller
usb usb1: Manufacturer: Linux 3.13.0-00298-g3c7cbb9-dirty dwc2_hsotg
usb usb1: SerialNumber: ffb40000.usb
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usbcore: registered new interface driver usb-storage
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
Bluetooth: Virtual HCI driver ver 1.4
Bluetooth: HCI UART driver ver 2.2
Bluetooth: HCI H4 protocol initialized
Bluetooth: HCI BCSP protocol initialized
Bluetooth: HCILL protocol initialized
Bluetooth: HCIATH3K protocol initialized
Bluetooth: HCI Three-wire UART (H5) protocol initialized
usbcore: registered new interface driver bcm203x
usbcore: registered new interface driver bpa10x
usbcore: registered new interface driver bfusb
usbcore: registered new interface driver btusb
Bluetooth: Generic Bluetooth SDIO driver ver 0.1
usbcore: registered new interface driver ath3k
Synopsys Designware Multimedia Card Interface Driver
cma: dma_alloc_from_contiguous(cma 8084c62c, count 1, align 0)
cma: dma_alloc_from_contiguous(): returned 80c5a820
dwmmc_socfpga ff704000.dwmmc0: Using internal DMA controller.
dwmmc_socfpga ff704000.dwmmc0: Version ID is 240a
dwmmc_socfpga ff704000.dwmmc0: DW MMC controller at irq 171, 32 bit host data width, 1024 deep fifo
dwmmc_socfpga ff704000.dwmmc0: 1 slots initialized
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
oprofile: using arm/armv7-ca9
TCP: cubic registered
NET: Registered protocol family 10
sit: IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
NET: Registered protocol family 15
can: controller area network core (rev 20120528 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20120528)
can: broadcast manager protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
Bluetooth: RFCOMM TTY layer initialized
Bluetooth: RFCOMM socket layer initialized
Bluetooth: RFCOMM ver 1.11
Bluetooth: BNEP (Ethernet Emulation) ver 1.3
Bluetooth: BNEP filters: protocol multicast
Bluetooth: BNEP socket layer initialized
Bluetooth: HIDP (Human Interface Emulation) ver 1.2
Bluetooth: HIDP socket layer initialized
8021q: 802.1Q VLAN Support v1.8
Key type dns_resolver registered
ThumbEE CPU extension supported.
Registering SWP/SWPB emulation handler
Waiting for root device /dev/mmcblk0p2...
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
mmc0: new high speed SDHC card at address 59b4
mmcblk0: mmc0:59b4 3.72 GiB
mmcblk0: p1 p2 p3
kjournald starting. Commit interval 5 seconds
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with ordered data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
devtmpfs: mounted
Freeing unused kernel memory: 372K (80777000 - 807d4000)
random: nonblocking pool is initialized
eth0: device MAC address 0e:a9:f1:02:28:ce
cma: dma_alloc_from_contiguous(cma 8084c62c, count 2, align 1)
cma: dma_alloc_from_contiguous(): returned 80c5a840
cma: dma_alloc_from_contiguous(cma 8084c62c, count 2, align 1)
cma: dma_alloc_from_contiguous(): returned 80c5a880
// unsharp_mask_axis.h
// 2015/09/26 by marsee
#ifndef __UNSHARP_MASK_AXIS_H_
#define __UNSHARP_MASK_AXIS_H_
#define HORIZONTAL_PIXEL_WIDTH 1280
#define VERTICAL_PIXEL_WIDTH 720
//#define HORIZONTAL_PIXEL_WIDTH 64
//#define VERTICAL_PIXEL_WIDTH 48
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#endif
// unsharp_mask_axis.h
// 2015/09/26 by marsee
#ifndef __UNSHARP_MASK_AXIS_H_
#define __UNSHARP_MASK_AXIS_H_
#define HORIZONTAL_PIXEL_WIDTH 1280
#define VERTICAL_PIXEL_WIDTH 720
//#define HORIZONTAL_PIXEL_WIDTH 64
//#define VERTICAL_PIXEL_WIDTH 48
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#define PRECISION 6 // 小数点以下の桁数、精度(0 以上の数を指定する)
#define K_BITLEN 4 // k のビット長
#define NUM_ADC_K 2 // k の小数点の位置
typedef ap_ufixedk_fixed_td;
typedef ap_fixed<6+PRECISION+NUM_ADC_K, (6+PRECISION+NUM_ADC_K)-PRECISION> x1y1_fixed_td;
typedef ap_fixed<6+PRECISION+NUM_ADC_K+8+3, (6+PRECISION+NUM_ADC_K+8+3)-PRECISION> y_fixed_td;
#endif
これで、C から HDL への合成をやり直してから、Run C/RTL Cosimulation ボタンをクリックしてC/RTL コシミュレーションを行った。#pragma HLS INTERFACE ap_ctrl_hs port=return
mse_b = 0.0108696
mse_g = 0.0125679
mse_r = 0.0288723
mse = 0.0174366
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点) , k != 0
// num_adec_k : Kの小数点の位置
// 2015/09/27 : 演算の小数部は num_adec_k*2 ビットとする。
// 2015/10/14 : ap_int に変更して、演算のビット幅を最適化する
//
#define PRECISION 6 // 小数点以下の桁数、精度(1以上)
int unsharp_masking(int pix_mat[3][3], int k, int num_adec_k)
{
y_td y;
y_td xy[3][3];
int result=0;
int z;
y_td x1y1 = (9<<(PRECISION+num_adec_k))/k + (8<<PRECISION);
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -(xy[0][0]<<PRECISION) -(xy[0][1]<<PRECISION) -(xy[0][2]<<PRECISION)
-(xy[1][0]<<PRECISION) +(x1y1*xy[1][1]) -(xy[1][2]<<PRECISION)
-(xy[2][0]<<PRECISION) -(xy[2][1]<<PRECISION) -(xy[2][2]<<PRECISION);
y = (((y_td)k * y)/(y_td)9) >> num_adec_k; // k は num_adc_k だけ左シフトされているので戻す
y = y + (y_td)(1<<(PRECISION-1)); // 四捨五入 +0.5
z = y >> PRECISION; // 小数点以下切り捨て
if (z<0) // 飽和演算
z = 0;
else if (z>255)
z = 255;
result += z<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
// unsharp_mask_axis.h
// 2015/09/26 by marsee
#ifndef __UNSHARP_MASK_AXIS_H_
#define __UNSHARP_MASK_AXIS_H_
//#define HORIZONTAL_PIXEL_WIDTH 1280
//#define VERTICAL_PIXEL_WIDTH 720
#define HORIZONTAL_PIXEL_WIDTH 64
#define VERTICAL_PIXEL_WIDTH 48
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#define PRECISION 6 // 小数点以下の桁数、精度(0 以上の数を指定する)
#define K_BITLEN 4 // k のビット長
#define NUM_ADC_K 2 // k の小数点の位置
typedef ap_int<6+PRECISION+NUM_ADC_K+8+3> y_td;
#endif
分母だが、最上位の2行は元の画素値なので、それを含めない画素数とした。Σ((浮動小数点数のアンシャープマスキング・フィルタ処理値) - (固定小数点のアンシャープマスキング・フィルタ処理値))の2乗) / (総画素数 - 2行分の画素)
と定義した時の平均2乗誤差を示す。(C シミュレーション結果)ap_ufixed<8, 8, AP_RND, AP_SAT> z;
となった。mse_b = 0.00679348
mse_g = 0.00679348
mse_r = 0.0078125
mse = 0.00713315
と定義した時の平均2乗誤差は、ap_ufixed<8, 8, AP_TRN, AP_SAT> z;
となって、AP_RND よりも大きくなった。(C シミュレーション結果)mse_b = 0.0108696
mse_g = 0.0125679
mse_r = 0.0288723
mse = 0.0174366
固定小数点型で量子化モードが AP_TRN の時の平均2乗誤差と同じになった。mse_b = 0.0108696
mse_g = 0.0125679
mse_r = 0.0288723
mse = 0.0174366
mse_b = 0.00611413
mse_g = 0.00577446
mse_r = 0.0115489
mse = 0.0078125
// ハードウェアとソフトウェアのラプラシアン・フィルタの値のチェック
cout << endl;
cout << "outs" << endl;
double mse = 0; // 全体の平均2乗誤差
double mse_r = 0; // 赤の平均2乗誤差
double mse_g = 0; // 緑の平均2乗誤差
double mse_b = 0; // 青の平均2乗誤差
for(int j=0; j < bmpihr.biHeight; j++){
for(i=0; i < bmpihr.biWidth; i++){
outs >> vals;
outs_soft >> vals_soft;
ap_int<32> val = vals.data;
ap_int<32> val_soft = vals_soft.data;
hw_usmd[(j*bmpihr.biWidth)+i] = (int)val;
if (val != val_soft){
printf("ERROR HW and SW results mismatch i = %ld, j = %ld, HW = %d, SW = %d\n", i, j, (int)val, (int)val_soft);
//return(1);
}
if (vals.last)
cout << "AXI-Stream is end" << endl;
mse_b += pow(((val_soft & 0xff) - (val & 0xff)), 2.0);
mse_g += pow((((val_soft>>8)&0xff) - ((val>>8)&0xff)), 2.0);
mse_r += pow((((val_soft>>16)&0xff) - ((val>>16)&0xff)), 2.0);
}
}
mse_b = mse_b/(bmpihr.biWidth*(bmpihr.biHeight-2)); // 2行は元の画素値なので、平均から外す
mse_g = mse_g/(bmpihr.biWidth*(bmpihr.biHeight-2)); // 2行は元の画素値なので、平均から外す
mse_r = mse_r/(bmpihr.biWidth*(bmpihr.biHeight-2)); // 2行は元の画素値なので、平均から外す
mse = (mse_b + mse_g + mse_r)/3;
cout << "mse_b = " << mse_b << endl;
cout << "mse_g = " << mse_g << endl;
cout << "mse_r = " << mse_r << endl;
cout << "mse = " << mse << endl;
//cout << "Success HW and SW results match" << endl;
cout << endl;
// unsharp_mask_axis.h
// 2015/09/26 by marsee
#ifndef __UNSHARP_MASK_AXIS_H_
#define __UNSHARP_MASK_AXIS_H_
//#define HORIZONTAL_PIXEL_WIDTH 1280
//#define VERTICAL_PIXEL_WIDTH 720
#define HORIZONTAL_PIXEL_WIDTH 64
#define VERTICAL_PIXEL_WIDTH 48
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#define K_BITLEN 4 // k のビット長
#define NUM_ADC_K 2 // k の小数点の位置
#endif
// unsharp_mask_axis.cpp
// 2015/09/24 by marsee
// 2015/10/11 : Half-Precision Floating-Point Data Types Version
//
#include <stdio.h>
#include <string.h>
#include <ap_int.h>
#include <hls_stream.h>
#include <ap_axi_sdata.h>
#include <hls_half.h>
#include "unsharp_mask_axis.h"
int unsharp_masking(int pix_mat[3][3], ap_uint<K_BITLEN> k);
int unsharp_mask_axis(ap_uint<1> usm_fil_enable, ap_uint<K_BITLEN> usm_fil_k, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs){
#pragma HLS INTERFACE ap_none port=usm_fil_enable
#pragma HLS INTERFACE ap_none port=usm_fil_k
#pragma HLS INTERFACE axis port=ins
#pragma HLS INTERFACE axis port=outs
#pragma HLS INTERFACE ap_ctrl_none port=return
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> usm;
int line_buf[2][HORIZONTAL_PIXEL_WIDTH];
#pragma HLS array_partition variable=line_buf block factor=2 dim=1
#pragma HLS resource variable=line_buf core=RAM_2P
int pix_mat[3][3];
#pragma HLS array_partition variable=pix_mat complete
int usm_fil_val;
do { // user が 1になった時にフレームがスタートする
ins >> pix;
} while(pix.user == 0);
for (int y=0; y<VERTICAL_PIXEL_WIDTH; y++){
for (int x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
#pragma HLS PIPELINE
if (!(x==0 && y==0)) // 最初の入力はすでに入力されている
ins >> pix; // AXI4-Stream からの入力
for (int i=0; i<3; i++){
for (int j=0; j<2; j++){
#pragma HLS UNROLL
pix_mat[i][j] = pix_mat[i][j+1];
}
}
pix_mat[0][2] = line_buf[0][x];
pix_mat[1][2] = line_buf[1][x];
pix_mat[2][2] = pix.data;
line_buf[0][x] = line_buf[1][x]; // 行の入れ替え
line_buf[1][x] = pix.data;
usm.data = unsharp_masking(pix_mat, usm_fil_k);
if (x<2 || y<2) // 最初の2行とその他の行の最初の2列は無効データなので元のデータとする
usm.data = pix.data;
if (x==0 && y==0) // 最初のデータでは、TUSERをアサートする
usm.user = 1;
else
usm.user = 0;
if (x == (HORIZONTAL_PIXEL_WIDTH-1)) // 行の最後で TLAST をアサートする
usm.last = 1;
else
usm.last = 0;
if (usm_fil_enable)
outs << usm; // AXI4-Stream へ出力
else
outs << pix; // 入力画像をそのまま出力
}
}
return 0;
}
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// K_BITLEN : 鮮鋭化の強さ(固定小数点)
// NUM_ADC_K : Kの小数点の位置
//
int unsharp_masking(int pix_mat[3][3], ap_uint<K_BITLEN> k)
{
half y;
int xy[3][3];
half rgb[3];
int result=0;
half fk = (half)k;
for (int m=0; m<NUM_ADC_K; m++){ // 小数点の位置を正しい位置にする
fk /= 2.0;
}
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -(half)xy[0][0] -(half)xy[0][1] -(half)xy[0][2]
-(half)xy[1][0] +(9.0/fk+8.0)*(half)xy[1][1] -(half)xy[1][2]
-(half)xy[2][0] -(half)xy[2][1] -(half)xy[2][2];
y = (fk * y)/9.0;
int z = (int)(y + 0.5); // 四捨五入
if (z<0) // 飽和演算
z = 0;
else if (z>255)
z = 255;
result += z<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
// unsharp_mask_axis_tb.cpp
// 2015/09/26 by marsee
//
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
#include <ap_int.h>
#include <hls_stream.h>
#include <iostream>
#include <fstream>
#include <ap_axi_sdata.h>
#include "bmp_header.h"
#include "unsharp_mask_axis.h"
int unsharp_mask_axis(ap_uint<1> usm_fil_enable, ap_uint<K_BITLEN> k_fixed, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs);
int unsharp_masking_soft(int pix_mat[3][3], int k, int num_adec_k);
int unsharp_mask_axis_soft(ap_uint<1> usm_fil_enable, ap_uint<4> usm_fil_k, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs, int width, int height);
#define CLOCK_PERIOD 10
#define K 2.5 // 鮮鋭化の強さ
#define NUM_ADEC_K 2 // Kの小数点の位置
int main()
{
using namespace std;
hls::stream<ap_axis<32,1,1,1> > ins;
hls::stream<ap_axis<32,1,1,1> > ins_soft;
hls::stream<ap_axis<32,1,1,1> > outs;
hls::stream<ap_axis<32,1,1,1> > outs_soft;
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> vals;
ap_axis<32,1,1,1> vals_soft;
int m_seq = 1; // M系列の値
int i;
int xor_shift;
BITMAPFILEHEADER bmpfhr; // BMPファイルのファイルヘッダ(for Read)
BITMAPINFOHEADER bmpihr; // BMPファイルのINFOヘッダ(for Read)
FILE *fbmpr, *fbmpw;
int *rd_bmp, *hw_usmd;
int blue, green, red;
if ((fbmpr = fopen("test.bmp", "rb")) == NULL){ // test.bmp をオープン
fprintf(stderr, "Can't open test.bmp by binary read mode\n");
exit(1);
}
// bmpヘッダの読み出し
fread(&bmpfhr.bfType, sizeof(char), 2, fbmpr);
fread(&bmpfhr.bfSize, sizeof(long), 1, fbmpr);
fread(&bmpfhr.bfReserved1, sizeof(short), 1, fbmpr);
fread(&bmpfhr.bfReserved2, sizeof(short), 1, fbmpr);
fread(&bmpfhr.bfOffBits, sizeof(long), 1, fbmpr);
fread(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpr);
// ピクセルを入れるメモリをアロケートする
if ((rd_bmp =(int *)malloc(sizeof(int) * (bmpihr.biWidth * bmpihr.biHeight))) == NULL){
fprintf(stderr, "Can't allocate rd_bmp memory\n");
exit(1);
}
if ((hw_usmd =(int *)malloc(sizeof(int) * (bmpihr.biWidth * bmpihr.biHeight))) == NULL){
fprintf(stderr, "Can't allocate hw_usmd memory\n");
exit(1);
}
// rd_bmp にBMPのピクセルを代入。その際に、行を逆転する必要がある
for (int y=0; y<bmpihr.biHeight; y++){
for (int x=0; x<bmpihr.biWidth; x++){
blue = fgetc(fbmpr);
green = fgetc(fbmpr);
red = fgetc(fbmpr);
rd_bmp[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] = (blue & 0xff) | ((green & 0xff)<<8) | ((red & 0xff)<<16);
}
}
fclose(fbmpr);
// ins に入力データを用意する
for(int i=0; i<5; i++){ // dummy data
pix.user = 0;
pix.data = i;
ins << pix;
}
for(int j=0; j < bmpihr.biHeight; j++){
for(i=0; i < bmpihr.biWidth; i++){
pix.data = (ap_int<32>)rd_bmp[(j*bmpihr.biWidth)+i];
if (j==0 && i==0) // 最初のデータの時に TUSER を 1 にする
pix.user = 1;
else
pix.user = 0;
if (i == bmpihr.biWidth-1) // 行の最後でTLASTをアサートする
pix.last = 1;
else
pix.last = 0;
ins << pix;
ins_soft << pix;
}
}
int usm_k = (int)(K * pow(2.0, (double)NUM_ADEC_K));
unsharp_mask_axis(1, (ap_uint<K_BITLEN>)K, ins, outs);
unsharp_mask_axis_soft(1, usm_k, ins_soft, outs_soft, bmpihr.biWidth, bmpihr.biHeight); // k = 2;
// ハードウェアとソフトウェアのラプラシアン・フィルタの値のチェック
cout << endl;
cout << "outs" << endl;
for(int j=0; j < bmpihr.biHeight; j++){
for(i=0; i < bmpihr.biWidth; i++){
outs >> vals;
outs_soft >> vals_soft;
ap_int<32> val = vals.data;
ap_int<32> val_soft = vals_soft.data;
hw_usmd[(j*bmpihr.biWidth)+i] = (int)val;
if (val != val_soft){
printf("ERROR HW and SW results mismatch i = %ld, j = %ld, HW = %d, SW = %d\n", i, j, (int)val, (int)val_soft);
//return(1);
}
if (vals.last)
cout << "AXI-Stream is end" << endl;
}
}
cout << "Success HW and SW results match" << endl;
cout << endl;
// ハードウェアのラプラシアンフィルタの結果を temp_usm.bmp へ出力する
if ((fbmpw=fopen("temp_usm.bmp", "wb")) == NULL){
fprintf(stderr, "Can't open temp_usm.bmp by binary write mode\n");
exit(1);
}
// BMPファイルヘッダの書き込み
fwrite(&bmpfhr.bfType, sizeof(char), 2, fbmpw);
fwrite(&bmpfhr.bfSize, sizeof(long), 1, fbmpw);
fwrite(&bmpfhr.bfReserved1, sizeof(short), 1, fbmpw);
fwrite(&bmpfhr.bfReserved2, sizeof(short), 1, fbmpw);
fwrite(&bmpfhr.bfOffBits, sizeof(long), 1, fbmpw);
fwrite(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpw);
// RGB データの書き込み、逆順にする
for (int y=0; y<bmpihr.biHeight; y++){
for (int x=0; x<bmpihr.biWidth; x++){
blue = hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] & 0xff;
green = (hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] >> 8) & 0xff;
red = (hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x]>>16) & 0xff;
fputc(blue, fbmpw);
fputc(green, fbmpw);
fputc(red, fbmpw);
}
}
fclose(fbmpw);
free(rd_bmp);
free(hw_usmd);
return 0;
}
int unsharp_mask_axis_soft(ap_uint<1> usm_fil_enable, ap_uint<4> usm_fil_k, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs, int width, int height){
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> usm;
int **line_buf;
int pix_mat[3][3];
int usm_fil_val;
int i;
// line_buf の1次元目の配列をアロケートする
if ((line_buf =(int **)malloc(sizeof(int *) * 2)) == NULL){
fprintf(stderr, "Can't allocate line_buf[3][]\n");
exit(1);
}
// メモリをアロケートする
for (i=0; i<2; i++){
if ((line_buf[i]=(int *)malloc(sizeof(int) * width)) == NULL){
fprintf(stderr, "Can't allocate line_buf[%d]\n", i);
exit(1);
}
}
do { // user が 1になった時にフレームがスタートする
ins >> pix;
} while(pix.user == 0);
for (int y=0; y<height; y++){
for (int x=0; x<width; x++){
if (!(x==0 && y==0)) // 最初の入力はすでに入力されている
ins >> pix; // AXI4-Stream からの入力
for (int k=0; k<3; k++){
for (int m=0; m<2; m++){
pix_mat[k][m] = pix_mat[k][m+1];
}
}
pix_mat[0][2] = line_buf[0][x];
pix_mat[1][2] = line_buf[1][x];
pix_mat[2][2] = pix.data;
line_buf[0][x] = line_buf[1][x]; // 行の入れ替え
line_buf[1][x] = pix.data;
usm.data = unsharp_masking_soft(pix_mat, (int)usm_fil_k, 2);
if (x<2 || y<2) // 最初の2行とその他の行の最初の2列は無効データなので元のデータとする
usm.data = pix.data;
if (x==0 && y==0) // 最初のデータでは、TUSERをアサートする
usm.user = 1;
else
usm.user = 0;
if (x == (HORIZONTAL_PIXEL_WIDTH-1)) // 行の最後で TLAST をアサートする
usm.last = 1;
else
usm.last = 0;
if (usm_fil_enable)
outs << usm; // AXI4-Stream へ出力
else
outs << pix; // 入力画像をそのまま出力
}
}
for (i=0; i<2; i++)
free(line_buf[i]);
free(line_buf);
return 0;
}
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点)
// num_adec_k : Kの小数点の位置
//
int unsharp_masking_soft(int pix_mat[3][3], int k, int num_adec_k)
{
float y;
int xy[3][3];
float rgb[3];
int result=0;
float fk = (float)k;
for (int m=0; m<num_adec_k; m++){ // 小数点の位置を正しい位置にする
fk /= 2.0;
}
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -(float)xy[0][0] -(float)xy[0][1] -(float)xy[0][2]
-(float)xy[1][0] +(9.0/fk+8.0)*(float)xy[1][1] -(float)xy[1][2]
-(float)xy[2][0] -(float)xy[2][1] -(float)xy[2][2];
y = (fk * y)/9.0;
int z = (int)(y + 0.5); // 四捨五入
if (z<0) // 飽和演算
z = 0;
else if (z>255)
z = 255;
result += z<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点) , k != 0
// num_adec_k : Kの小数点の位置
//
int unsharp_masking(int pix_mat[3][3], k_fixed_td k_fixed)
{
ap_ufixed<8, 8> xy[3][3];
int result=0;
ap_ufixed<8, 8, AP_RND, AP_SAT> z;
x1y1_fixed_td x1y1;
y_fixed_td y;
x1y1 = (x1y1_fixed_td)9/(x1y1_fixed_td)k_fixed + (x1y1_fixed_td)8; // ビット長は 9+8 が2^5=32 より小さく、k_fixedで割るので、NUM_ADC_Kが増える可能性がある
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -xy[0][0] -xy[0][1] -xy[0][2]
-xy[1][0] +x1y1*xy[1][1] -xy[1][2]
-xy[2][0] -xy[2][1] -xy[2][2];
y = (k_fixed * y)/(y_fixed_td)9;
y = y+(y_fixed_td)0.5; // 四捨五入
if (y < 0)
z = 0;
else if (y > 255)
z = 255;
else
z = y;
result += z.to_int()<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
// unsharp_mask_axis.h
// 2015/09/26 by marsee
#ifndef __UNSHARP_MASK_AXIS_H_
#define __UNSHARP_MASK_AXIS_H_
//#define HORIZONTAL_PIXEL_WIDTH 1280
//#define VERTICAL_PIXEL_WIDTH 720
#define HORIZONTAL_PIXEL_WIDTH 64
#define VERTICAL_PIXEL_WIDTH 48
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
#define PRECISION 6 // 小数点以下の桁数、精度(0 以上の数を指定する)
#define K_BITLEN 4 // k のビット長
#define NUM_ADC_K 2 // k の小数点の位置
typedef ap_ufixed<K_BITLEN, K_BITLEN-NUM_ADC_K> k_fixed_td;
typedef ap_fixed<6+PRECISION+NUM_ADC_K, (6+PRECISION+NUM_ADC_K)-PRECISION> x1y1_fixed_td;
typedef ap_fixed<6+PRECISION+NUM_ADC_K+8+3, (6+PRECISION+NUM_ADC_K+8+3)-PRECISION> y_fixed_td;
#endif
// lap_filter_axis.h
// 2015/05/01
#define HORIZONTAL_PIXEL_WIDTH 800
#define VERTICAL_PIXEL_WIDTH 600
// #define HORIZONTAL_PIXEL_WIDTH 50
// #define VERTICAL_PIXEL_WIDTH 10
#define ALL_PIXEL_VALUE (HORIZONTAL_PIXEL_WIDTH*VERTICAL_PIXEL_WIDTH)
だそうだ・Open Wave Viewer toolbar buttonが付いた
・半精度の浮動小数点数が hls_half.h をインクルードすることで使えるようなった。
・DATAFLOW ディレクティブが改善された。
・AXI4 master (m_axi)がループ内で自動でバースト転送を推論してくれるようになった。
・config_interface でのAXI-Stream (axis) のレジスタ・オプション
・AXI-Lite (s_axilite) に独自クロックを割り当てられるようになった。
・新しいリソース・コア・オプション(Mul_LUT)
module lap_filter_axis (
ap_clk,
ap_rst_n,
ins_TDATA,
ins_TVALID,
ins_TREADY,
ins_TKEEP,
ins_TSTRB,
ins_TUSER,
ins_TLAST,
ins_TID,
ins_TDEST,
outs_TDATA,
outs_TVALID,
outs_TREADY,
outs_TKEEP,
outs_TSTRB,
outs_TUSER,
outs_TLAST,
outs_TID,
outs_TDEST,
s_axi_AXILiteS_AWVALID,
s_axi_AXILiteS_AWREADY,
s_axi_AXILiteS_AWADDR,
s_axi_AXILiteS_WVALID,
s_axi_AXILiteS_WREADY,
s_axi_AXILiteS_WDATA,
s_axi_AXILiteS_WSTRB,
s_axi_AXILiteS_ARVALID,
s_axi_AXILiteS_ARREADY,
s_axi_AXILiteS_ARADDR,
s_axi_AXILiteS_RVALID,
s_axi_AXILiteS_RREADY,
s_axi_AXILiteS_RDATA,
s_axi_AXILiteS_RRESP,
s_axi_AXILiteS_BVALID,
s_axi_AXILiteS_BREADY,
s_axi_AXILiteS_BRESP,
interrupt,
axils_clk,
ap_rst_n_axils_clk
);
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点) , k != 0
// num_adec_k : Kの小数点の位置
// 2015/09/27 : 演算の小数部は num_adec_k*2 ビットとする。
//
#define PRECISION 6 // 小数点以下の桁数、精度(1以上)
int unsharp_masking(int pix_mat[3][3], int k, int num_adec_k)
{
int y;
int xy[3][3];
int result=0;
int z;
int x1y1 = (9<<(PRECISION+num_adec_k))/k + (8<<PRECISION);
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -(xy[0][0]<<PRECISION) -(xy[0][1]<<PRECISION) -(xy[0][2]<<PRECISION)
-(xy[1][0]<<PRECISION) +x1y1*xy[1][1] -(xy[1][2]<<PRECISION)
-(xy[2][0]<<PRECISION) -(xy[2][1]<<PRECISION) -(xy[2][2]<<PRECISION);
y = ((k * y)/9) >> num_adec_k; // k は num_adc_k だけ左シフトされているので戻す
z = y + (1<<(PRECISION-1)); // 四捨五入 +0.5
z = z >> PRECISION; // 小数点以下切り捨て
if (z<0) // 飽和演算
z = 0;
else if (z>255)
z = 255;
result += z<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
は、iint x1y1 = (9<<(PRECISION+num_adec_k))/k + (8<<PRECISION);
に変更した。ap_ufixed<5+PRECISION+NUM_ADC_K, (5+PRECISION+NUM_ADC_K)-PRECISION, AP_RND, AP_SAT> x1y1 = 9/k_fixed + 8;
int unsharp_masking(int pix_mat[3][3], k_fixed_td k_fixed)
{
ap_ufixed<8, 8, AP_RND, AP_SAT> xy[3][3];
int result=0;
ap_ufixed<8, 8, AP_RND, AP_SAT> z;
x1y1_fixed_td x1y1, x1y1_2;
ap_ufixed<5+PRECISION+NUM_ADC_K+8+3, (5+PRECISION+NUM_ADC_K+8+3)-PRECISION, AP_RND, AP_SAT> y;
x1y1 = (x1y1_fixed_td)9/(x1y1_fixed_td)k_fixed + (x1y1_fixed_td)8; // ビット長は 9+8 が2^5=32 より小さく、k_fixedで割るので、NUM_ADC_Kが増える可能性がある
x1y1_2 = 9/k_fixed + 8;
cout << "x1y1 = " << x1y1 << endl;
cout << "x1y1_2 = " << x1y1_2 << endl;
Compiling ../../../unsharp_mask_axis_tb.cpp in debug mode
Compiling ../../../unsharp_mask_axis.cpp in debug mode
Generating csim.exe
x1y1 = 10.5625
x1y1_2 = 10
x1y1 = 10.5625
x1y1_2 = 10
typedef ap_ufixed
// unsharp_mask_axis.cpp
// 2015/09/24 by marsee
// ap_fixedバージョン 2015/10/04
//
#include <stdio.h>
#include <string.h>
#include <ap_int.h>
#include <ap_fixed.h>
#include <hls_stream.h>
#include <ap_axi_sdata.h>
#include <iostream>
#include "unsharp_mask_axis.h"
using namespace std;
int unsharp_masking(int pix_mat[3][3], k_fixed_td k_fixed);
int unsharp_mask_axis(ap_uint<1> usm_fil_enable, k_fixed_td k_fixed, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs){
#pragma HLS INTERFACE ap_none port=usm_fil_enable
#pragma HLS INTERFACE ap_none port=k_fixed
#pragma HLS INTERFACE axis port=ins
#pragma HLS INTERFACE axis port=outs
#pragma HLS INTERFACE ap_ctrl_none port=return
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> usm;
int line_buf[2][HORIZONTAL_PIXEL_WIDTH];
#pragma HLS array_partition variable=line_buf block factor=2 dim=1
#pragma HLS resource variable=line_buf core=RAM_2P
int pix_mat[3][3];
#pragma HLS array_partition variable=pix_mat complete
int usm_fil_val;
do { // user が 1になった時にフレームがスタートする
ins >> pix;
} while(pix.user == 0);
for (int y=0; y<VERTICAL_PIXEL_WIDTH; y++){
for (int x=0; x<HORIZONTAL_PIXEL_WIDTH; x++){
#pragma HLS PIPELINE
if (!(x==0 && y==0)) // 最初の入力はすでに入力されている
ins >> pix; // AXI4-Stream からの入力
for (int i=0; i<3; i++){
for (int j=0; j<2; j++){
#pragma HLS UNROLL
pix_mat[i][j] = pix_mat[i][j+1];
}
}
pix_mat[0][2] = line_buf[0][x];
pix_mat[1][2] = line_buf[1][x];
pix_mat[2][2] = pix.data;
line_buf[0][x] = line_buf[1][x]; // 行の入れ替え
line_buf[1][x] = pix.data;
usm.data = unsharp_masking(pix_mat, k_fixed);
if (x<2 || y<2) // 最初の2行とその他の行の最初の2列は無効データなので元のデータとする
usm.data = pix.data;
if (x==0 && y==0) // 最初のデータでは、TUSERをアサートする
usm.user = 1;
else
usm.user = 0;
if (x == (HORIZONTAL_PIXEL_WIDTH-1)) // 行の最後で TLAST をアサートする
usm.last = 1;
else
usm.last = 0;
if (usm_fil_enable)
outs << usm; // AXI4-Stream へ出力
else
outs << pix; // 入力画像をそのまま出力
}
}
return 0;
}
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点) , k != 0
// num_adec_k : Kの小数点の位置
//
int unsharp_masking(int pix_mat[3][3], k_fixed_td k_fixed)
{
ap_ufixed<8, 8, AP_RND, AP_SAT> xy[3][3];
int result=0;
ap_ufixed<8, 8, AP_RND, AP_SAT> z;
x1y1_fixed_td x1y1;
y_fixed_td y;
/*ap_ufixed<8, 8> xy[3][3]; int result=0; ap_ufixed<8, 8, AP_RND, AP_SAT> z; x1y1_fixed_td x1y1; y_fixed_td y;*/
x1y1 = (x1y1_fixed_td)9/(x1y1_fixed_td)k_fixed + (x1y1_fixed_td)8; // ビット長は 9+8 が2^5=32 より小さく、k_fixedで割るので、NUM_ADC_Kが増える可能性がある
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -xy[0][0] -xy[0][1] -xy[0][2]
-xy[1][0] +x1y1*xy[1][1] -xy[1][2]
-xy[2][0] -xy[2][1] -xy[2][2];
y = (k_fixed * y)/(y_fixed_td)9;
y = y+(y_fixed_td)0.5; // 四捨五入
if (y < 0)
z = 0;
else if (y > 255)
z = 255;
else
z = y;
result += z.to_int()<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
// unsharp_mask_axis_tb.cpp
// 2015/09/26 by marsee
//
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <math.h>
#include <ap_int.h>
#include <hls_stream.h>
#include <iostream>
#include <fstream>
#include <ap_axi_sdata.h>
#include "bmp_header.h"
#include "unsharp_mask_axis.h"
int unsharp_mask_axis(ap_uint<1> usm_fil_enable, k_fixed_td k_fixed, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs);
int unsharp_masking_soft(int pix_mat[3][3], int k, int num_adec_k);
int unsharp_mask_axis_soft(ap_uint<1> usm_fil_enable, ap_uint<4> usm_fil_k, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs, int width, int height);
#define CLOCK_PERIOD 10
#define K 2.5 // 鮮鋭化の強さ
#define NUM_ADEC_K 2 // Kの小数点の位置
int main()
{
using namespace std;
hls::stream<ap_axis<32,1,1,1> > ins;
hls::stream<ap_axis<32,1,1,1> > ins_soft;
hls::stream<ap_axis<32,1,1,1> > outs;
hls::stream<ap_axis<32,1,1,1> > outs_soft;
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> vals;
ap_axis<32,1,1,1> vals_soft;
int m_seq = 1; // M系列の値
int i;
int xor_shift;
BITMAPFILEHEADER bmpfhr; // BMPファイルのファイルヘッダ(for Read)
BITMAPINFOHEADER bmpihr; // BMPファイルのINFOヘッダ(for Read)
FILE *fbmpr, *fbmpw;
int *rd_bmp, *hw_usmd;
int blue, green, red;
k_fixed_td k_fixed;
if ((fbmpr = fopen("test.bmp", "rb")) == NULL){ // test.bmp をオープン
fprintf(stderr, "Can't open test.bmp by binary read mode\n");
exit(1);
}
// bmpヘッダの読み出し
fread(&bmpfhr.bfType, sizeof(char), 2, fbmpr);
fread(&bmpfhr.bfSize, sizeof(long), 1, fbmpr);
fread(&bmpfhr.bfReserved1, sizeof(short), 1, fbmpr);
fread(&bmpfhr.bfReserved2, sizeof(short), 1, fbmpr);
fread(&bmpfhr.bfOffBits, sizeof(long), 1, fbmpr);
fread(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpr);
// ピクセルを入れるメモリをアロケートする
if ((rd_bmp =(int *)malloc(sizeof(int) * (bmpihr.biWidth * bmpihr.biHeight))) == NULL){
fprintf(stderr, "Can't allocate rd_bmp memory\n");
exit(1);
}
if ((hw_usmd =(int *)malloc(sizeof(int) * (bmpihr.biWidth * bmpihr.biHeight))) == NULL){
fprintf(stderr, "Can't allocate hw_usmd memory\n");
exit(1);
}
// rd_bmp にBMPのピクセルを代入。その際に、行を逆転する必要がある
for (int y=0; y<bmpihr.biHeight; y++){
for (int x=0; x<bmpihr.biWidth; x++){
blue = fgetc(fbmpr);
green = fgetc(fbmpr);
red = fgetc(fbmpr);
rd_bmp[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] = (blue & 0xff) | ((green & 0xff)<<8) | ((red & 0xff)<<16);
}
}
fclose(fbmpr);
// ins に入力データを用意する
for(int i=0; i<5; i++){ // dummy data
pix.user = 0;
pix.data = i;
ins << pix;
}
for(int j=0; j < bmpihr.biHeight; j++){
for(i=0; i < bmpihr.biWidth; i++){
pix.data = (ap_int<32>)rd_bmp[(j*bmpihr.biWidth)+i];
if (j==0 && i==0) // 最初のデータの時に TUSER を 1 にする
pix.user = 1;
else
pix.user = 0;
if (i == bmpihr.biWidth-1) // 行の最後でTLASTをアサートする
pix.last = 1;
else
pix.last = 0;
ins << pix;
ins_soft << pix;
}
}
int usm_k = (int)(K * pow(2.0, (double)NUM_ADEC_K));
k_fixed = K;
unsharp_mask_axis(1, k_fixed, ins, outs);
unsharp_mask_axis_soft(1, usm_k, ins_soft, outs_soft, bmpihr.biWidth, bmpihr.biHeight); // k = 2;
// ハードウェアとソフトウェアのラプラシアン・フィルタの値のチェック
cout << endl;
cout << "outs" << endl;
for(int j=0; j < bmpihr.biHeight; j++){
for(i=0; i < bmpihr.biWidth; i++){
outs >> vals;
outs_soft >> vals_soft;
ap_int<32> val = vals.data;
ap_int<32> val_soft = vals_soft.data;
hw_usmd[(j*bmpihr.biWidth)+i] = (int)val;
if (val != val_soft){
printf("ERROR HW and SW results mismatch i = %ld, j = %ld, HW = %d, SW = %d\n", i, j, (int)val, (int)val_soft);
//return(1);
}
if (vals.last)
cout << "AXI-Stream is end" << endl;
}
}
cout << "Success HW and SW results match" << endl;
cout << endl;
// ハードウェアのラプラシアンフィルタの結果を temp_usm.bmp へ出力する
if ((fbmpw=fopen("temp_usm.bmp", "wb")) == NULL){
fprintf(stderr, "Can't open temp_usm.bmp by binary write mode\n");
exit(1);
}
// BMPファイルヘッダの書き込み
fwrite(&bmpfhr.bfType, sizeof(char), 2, fbmpw);
fwrite(&bmpfhr.bfSize, sizeof(long), 1, fbmpw);
fwrite(&bmpfhr.bfReserved1, sizeof(short), 1, fbmpw);
fwrite(&bmpfhr.bfReserved2, sizeof(short), 1, fbmpw);
fwrite(&bmpfhr.bfOffBits, sizeof(long), 1, fbmpw);
fwrite(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpw);
// RGB データの書き込み、逆順にする
for (int y=0; y<bmpihr.biHeight; y++){
for (int x=0; x<bmpihr.biWidth; x++){
blue = hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] & 0xff;
green = (hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] >> 8) & 0xff;
red = (hw_usmd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x]>>16) & 0xff;
fputc(blue, fbmpw);
fputc(green, fbmpw);
fputc(red, fbmpw);
}
}
fclose(fbmpw);
free(rd_bmp);
free(hw_usmd);
return 0;
}
int unsharp_mask_axis_soft(ap_uint<1> usm_fil_enable, ap_uint<4> usm_fil_k, hls::stream<ap_axis<32,1,1,1> >& ins, hls::stream<ap_axis<32,1,1,1> >& outs, int width, int height){
ap_axis<32,1,1,1> pix;
ap_axis<32,1,1,1> usm;
int **line_buf;
int pix_mat[3][3];
int usm_fil_val;
int i;
// line_buf の1次元目の配列をアロケートする
if ((line_buf =(int **)malloc(sizeof(int *) * 2)) == NULL){
fprintf(stderr, "Can't allocate line_buf[3][]\n");
exit(1);
}
// メモリをアロケートする
for (i=0; i<2; i++){
if ((line_buf[i]=(int *)malloc(sizeof(int) * width)) == NULL){
fprintf(stderr, "Can't allocate line_buf[%d]\n", i);
exit(1);
}
}
do { // user が 1になった時にフレームがスタートする
ins >> pix;
} while(pix.user == 0);
for (int y=0; y<height; y++){
for (int x=0; x<width; x++){
if (!(x==0 && y==0)) // 最初の入力はすでに入力されている
ins >> pix; // AXI4-Stream からの入力
for (int k=0; k<3; k++){
for (int m=0; m<2; m++){
pix_mat[k][m] = pix_mat[k][m+1];
}
}
pix_mat[0][2] = line_buf[0][x];
pix_mat[1][2] = line_buf[1][x];
pix_mat[2][2] = pix.data;
line_buf[0][x] = line_buf[1][x]; // 行の入れ替え
line_buf[1][x] = pix.data;
usm.data = unsharp_masking_soft(pix_mat, (int)usm_fil_k, 2);
if (x<2 || y<2) // 最初の2行とその他の行の最初の2列は無効データなので元のデータとする
usm.data = pix.data;
if (x==0 && y==0) // 最初のデータでは、TUSERをアサートする
usm.user = 1;
else
usm.user = 0;
if (x == (HORIZONTAL_PIXEL_WIDTH-1)) // 行の最後で TLAST をアサートする
usm.last = 1;
else
usm.last = 0;
if (usm_fil_enable)
outs << usm; // AXI4-Stream へ出力
else
outs << pix; // 入力画像をそのまま出力
}
}
for (i=0; i<2; i++)
free(line_buf[i]);
free(line_buf);
return 0;
}
// アンシャープマスキング・フィルタ
// x0y0 x1y0 x2y0 -k -j -k
// x0y1 x1y1 x2y1 -k 9+8k -k x 1/9
// x0y2 x1y2 x2y2 -k -k -k
//
// k : 鮮鋭化の強さ(固定小数点)
// num_adec_k : Kの小数点の位置
//
int unsharp_masking_soft(int pix_mat[3][3], int k, int num_adec_k)
{
float y;
int xy[3][3];
float rgb[3];
int result=0;
float fk = (float)k;
for (int m=0; m<num_adec_k; m++){ // 小数点の位置を正しい位置にする
fk /= 2.0;
}
for (int i=0; i<=16; i += 8){
for (int j=0; j<3; j++){
for (int k=0; k<3; k++){
xy[j][k] = (pix_mat[j][k] >> i) & 0xff; // RGBのいずれかを抽出
}
}
y = -(float)xy[0][0] -(float)xy[0][1] -(float)xy[0][2]
-(float)xy[1][0] +(9.0/fk+8.0)*(float)xy[1][1] -(float)xy[1][2]
-(float)xy[2][0] -(float)xy[2][1] -(float)xy[2][2];
y = (fk * y)/9.0;
int z = (int)(y + 0.5); // 四捨五入
if (z<0) // 飽和演算
z = 0;
else if (z>255)
z = 255;
result += z<<i; // i=0 : blue, i=8 : green, i=16 : red
}
return(result);
}
ですが、自分の環境の multi_axim-master/solution1/sim/verilog フォルダに移動して下さい。コマンドを入れるとフォルダの選択肢をTcl Console が表示してくれます。cd c:/Users/Masaaki/Documents/Vivado_HLS/ZYBO/examples/multi_axim-master/solution1/sim/verilog
をTcl Console に入力します。3つのコマンドをコピー&ペーストしても問題無いです。current_fileset
open_wave_database multi_axim.wdb
open_wave_config multi_axim.wcfg
Vivado HLSの生成したドライバの使い方です。
- 最初にX<関数名>_Initialize()、またはX<関数名>_LookupConfig()とX<関数名>_CfgInitialize()の組
- ベアメタル・アプリのDeviceIdは最初のインスタンスは0、次は1
- X<関数名>_Set_入力ポートで入力ポートの値をWriteする
- X<関数名>_IsIdleでアイドル状態であることを確認
- X<関数名>_StartでIPのステートマシンをスタート
- X<関数名>_IsDone、X<関数名>_出力ポート_vldを確認
- X<関数名>_Get_出力ポートをReadする
set_property PACKAGE_PIN P20 [get_ports {vga_pBlue[0]}]
set_property PACKAGE_PIN M20 [get_ports {vga_pBlue[1]}]
set_property PACKAGE_PIN K19 [get_ports {vga_pBlue[2]}]
set_property PACKAGE_PIN J18 [get_ports {vga_pBlue[3]}]
set_property PACKAGE_PIN G19 [get_ports {vga_pBlue[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pBlue[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pBlue[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pBlue[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pBlue[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pBlue[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pGreen[0]}]
set_property PACKAGE_PIN H18 [get_ports {vga_pGreen[0]}]
set_property PACKAGE_PIN N20 [get_ports {vga_pGreen[1]}]
set_property PACKAGE_PIN L19 [get_ports {vga_pGreen[2]}]
set_property PACKAGE_PIN J19 [get_ports {vga_pGreen[3]}]
set_property PACKAGE_PIN H20 [get_ports {vga_pGreen[4]}]
set_property PACKAGE_PIN F20 [get_ports {vga_pGreen[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pRed[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pRed[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pRed[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pRed[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {vga_pRed[0]}]
set_property PACKAGE_PIN M19 [get_ports {vga_pRed[0]}]
set_property PACKAGE_PIN L20 [get_ports {vga_pRed[1]}]
set_property PACKAGE_PIN J20 [get_ports {vga_pRed[2]}]
set_property PACKAGE_PIN G20 [get_ports {vga_pRed[3]}]
set_property PACKAGE_PIN F19 [get_ports {vga_pRed[4]}]
set_property PACKAGE_PIN H16 [get_ports TMDS_Clk_p]
set_property PACKAGE_PIN D19 [get_ports {TMDS_Data_p[0]}]
set_property PACKAGE_PIN C20 [get_ports {TMDS_Data_p[1]}]
set_property PACKAGE_PIN B19 [get_ports {TMDS_Data_p[2]}]
set_property PACKAGE_PIN G18 [get_ports ddc_sda_io]
set_property PACKAGE_PIN G17 [get_ports ddc_scl_io]
set_property PACKAGE_PIN P19 [get_ports vga_pHSync]
set_property IOSTANDARD LVCMOS33 [get_ports vga_pHSync]
set_property IOSTANDARD LVCMOS33 [get_ports vga_pVSync]
set_property PACKAGE_PIN R19 [get_ports vga_pVSync]
set_property PACKAGE_PIN L16 [get_ports clk125]
#set_property PACKAGE_PIN R18 [get_ports reset]
#set_property IOSTANDARD LVCMOS33 [get_ports reset]
set_property IOSTANDARD LVCMOS33 [get_ports clk125]
set_property IOSTANDARD LVCMOS33 [get_ports ddc_scl_io]
set_property IOSTANDARD LVCMOS33 [get_ports ddc_sda_io]
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_hpd[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {hdmi_out_en[0]}]
set_property PACKAGE_PIN E18 [get_ports {hdmi_hpd[0]}]
set_property PACKAGE_PIN F17 [get_ports {hdmi_out_en[0]}]
set_property PACKAGE_PIN G15 [get_ports {sw[0]}]
set_property PACKAGE_PIN P15 [get_ports {sw[1]}]
set_property PACKAGE_PIN W13 [get_ports {sw[2]}]
set_property PACKAGE_PIN T16 [get_ports {sw[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {sw[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {sw[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}]
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