sudo dpkg --add-architecture i386
wget https://dl.winehq.org/wine-builds/Release.key
sudo apt-key add Release.key
sudo apt-add-repository https://dl.winehq.org/wine-builds/ubuntu/
sudo apt-get update
sudo apt-get install --install-recommends winehq-stable
[Place 30-640] Place Check : This design requires more Slice LUTs cells than are available in the target device. This design requires 19586 of such cell types but only 17600 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device. Please set tcl parameter "drc.disableLUTOverUtilError" to 1 to change this error to warning.
// wl_traceing_cnn.cpp
// 2017/09/18 by marsee
// 2017/10/19 : for ZYBO Z7-20
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <string.h>
#include "xpwm.h"
#include "xdmar4resize_gray.h"
#include "xresize_gray.h"
#include "xstraight_conv_nn2_axis2.h"
#define CMA_START_ADDRESS 0x17800000
#define VIDEO_BUFFER_START_ADDRESS 0x18000000 // Limit 0x18800000, 800*600*4 = 2MBytes * 2
#define HORIZONTAL_PIXEL 800
#define ALL_CHAR_OF_1LINE (HORIZONTAL_PIXEL/8)
#define VERTICAL_PIXEL 600
#define ALL_CHAR_OF_ROW (VERTICAL_PIXEL/8)
#define ALL_DISP_ADDRESS (HORIZONTAL_PIXEL*VERTICAL_PIXEL*4)
#define ALL_DISP_CHARACTOR (HORIZONTAL_PIXEL*VERTICAL_PIXEL)
#define DEBUG
//#define MOTOR_OFF
void cam_i2c_init(volatile unsigned *mt9d111_axi_iic) {
mt9d111_axi_iic[64] = 0x2; // reset tx fifo ,address is 0x100, i2c_control_reg
mt9d111_axi_iic[64] = 0x1; // enable i2c
}
void cam_i2x_write_sync(void) {
// unsigned c;
// c = *cam_i2c_rx_fifo;
// while ((c & 0x84) != 0x80)
// c = *cam_i2c_rx_fifo; // No Bus Busy and TX_FIFO_Empty = 1
usleep(1000);
}
void cam_i2c_write(volatile unsigned *mt9d111_axi_iic, unsigned int device_addr, unsigned int write_addr, unsigned int write_data){
mt9d111_axi_iic[66] = 0x100 | (device_addr & 0xfe); // Slave IIC Write Address, address is 0x108, i2c_tx_fifo
mt9d111_axi_iic[66] = write_addr;
mt9d111_axi_iic[66] = (write_data >> 8)|0xff; // first data
mt9d111_axi_iic[66] = 0x200 | (write_data & 0xff); // second data
cam_i2x_write_sync();
}
// Motor
//
void motor_settings(XPwm *motorLp, XPwm *motorRp){
XPwm_DisableAutoRestart(motorLp);
while(!XPwm_IsIdle(motorLp)) ;
XPwm_Start(motorLp);
XPwm_EnableAutoRestart(motorLp);
XPwm_DisableAutoRestart(motorRp);
while(!XPwm_IsIdle(motorRp)) ;
XPwm_Start(motorRp);
XPwm_EnableAutoRestart(motorRp);
}
void Stopped_Zybot(XPwm *motorLp, XPwm *motorRp){
XPwm_Set_sw_late_V(motorLp, 0);
XPwm_Set_sw_late_V(motorRp, 0);
}
int main()
{
int fd0, fd1, fd2, fd3, fd4, fd5, fd6, fd8, fd9, fd10;
volatile unsigned *bmdc_axi_lites0;
volatile unsigned *dmaw4gabor_0;
volatile unsigned *axis_switch_0, *axis_switch_1;
volatile unsigned *mt9d111_inf_axis_0;
volatile unsigned *mt9d111_axi_iic;
volatile unsigned *axi_gpio_0;
volatile unsigned *frame_buffer_bmdc;
char attr[1024];
unsigned long phys_addr;
int i;
XDmar4resize_gray xdmar;
XResize_gray resg;
XStraight_conv_nn2_axis2 stcnn;
XPwm motorL, motorR;
XPwm *motorLp, *motorRp;
motorLp = &motorL;
motorRp = &motorR;
// Bitmap Display Controller 0 AXI4 Lite Slave (UIO6)
fd6 = open("/dev/uio6", O_RDWR); // bitmap_display_controller 0 axi4 lite
if (fd6 < 1){
fprintf(stderr, "/dev/uio6 (bitmap_disp_cntrler_axi_master_0) open error\n");
exit(-1);
}
bmdc_axi_lites0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd6, 0);
if (!bmdc_axi_lites0){
fprintf(stderr, "bmdc_axi_lites0 mmap error\n");
exit(-1);
}
// dmaw4gabor_0 (UIO1)
fd1 = open("/dev/uio1", O_RDWR); // dmaw4gabor_0 interface AXI4 Lite Slave
if (fd1 < 1){
fprintf(stderr, "/dev/uio1 (dmaw4gabor_0) open error\n");
exit(-1);
}
dmaw4gabor_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!dmaw4gabor_0){
fprintf(stderr, "dmaw4gabor_0 mmap error\n");
exit(-1);
}
// mt9d111 i2c AXI4 Lite Slave (UIO0)
fd0 = open("/dev/uio0", O_RDWR); // mt9d111 i2c AXI4 Lite Slave
if (fd0 < 1){
fprintf(stderr, "/dev/uio0 (mt9d111_axi_iic) open error\n");
exit(-1);
}
mt9d111_axi_iic = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd0, 0);
if (!mt9d111_axi_iic){
fprintf(stderr, "mt9d111_axi_iic mmap error\n");
exit(-1);
}
// mt9d111 inf axis AXI4 Lite Slave (UIO5)
fd5 = open("/dev/uio5", O_RDWR); // mt9d111 inf axis AXI4 Lite Slave
if (fd5 < 1){
fprintf(stderr, "/dev/uio5 (mt9d111_inf_axis_0) open error\n");
exit(-1);
}
mt9d111_inf_axis_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd5, 0);
if (!mt9d111_inf_axis_0){
fprintf(stderr, "mt9d111_inf_axis_0 mmap error\n");
exit(-1);
}
// axis_switch_0 (UIO2)
fd2 = open("/dev/uio2", O_RDWR); // axis_switch_0 interface AXI4 Lite Slave
if (fd2 < 1){
fprintf(stderr, "/dev/uio2 (axis_switch_0) open error\n");
exit(-1);
}
axis_switch_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd2, 0);
if (!axis_switch_0){
fprintf(stderr, "axis_switch_0 mmap error\n");
exit(-1);
}
// axis_switch_1 (UIO3)
fd3 = open("/dev/uio3", O_RDWR); // axis_switch_1 interface AXI4 Lite Slave
if (fd3 < 1){
fprintf(stderr, "/dev/uio3 (axis_switch_1) open error\n");
exit(-1);
}
axis_switch_1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd3, 0);
if (!axis_switch_1){
fprintf(stderr, "axis_switch_1 mmap error\n");
exit(-1);
}
// axi_gpio_0 (UIO8)
fd8 = open("/dev/uio8", O_RDWR); // axi_gpio_0 interface AXI4 Lite Slave
if (fd8 < 1){
fprintf(stderr, "/dev/uio8 (axi_gpio_0) open error\n");
exit(-1);
}
axi_gpio_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd8, 0);
if (!axi_gpio_0){
fprintf(stderr, "axi_gpio_8 mmap error\n");
exit(-1);
}
// udmabuf0
fd9 = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fd9 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
frame_buffer_bmdc = (volatile unsigned *)mmap(NULL, 5760000, PROT_READ|PROT_WRITE, MAP_SHARED, fd9, 0);
if (!frame_buffer_bmdc){
fprintf(stderr, "frame_buffer_bmdc mmap error\n");
exit(-1);
}
// axis_switch_1, 1to2 ,Select M00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_1[16] = 0x0; // 0x40 = 0
axis_switch_1[17] = 0x80000000; // 0x44 = 0x80000000, disable
axis_switch_1[18] = 0x80000000; // 0x48 = 0x80000000, disable
axis_switch_1[19] = 0x80000000; // 0x4C = 0x80000000, disable
axis_switch_1[0] = 0x2; // Comit registers
// axis_switch_0, 2to1, Select S00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_0[16] = 0x0; // 0x40 = 0;
axis_switch_0[0] = 0x2; // Comit registers
// phys_addr of udmabuf0
fd10 = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd10 == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd10, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd10);
printf("phys_addr = %x\n", (int)phys_addr);
// DMAW4Gabor Initialization sequence
dmaw4gabor_0[6] = (unsigned int)phys_addr; // Data signal of frame_buffer0
dmaw4gabor_0[8] = (unsigned int)phys_addr+ALL_DISP_ADDRESS; // Data signal of frame_buffer1
dmaw4gabor_0[0] = 0x1; // ap_start = 1
dmaw4gabor_0[0] = 0x80; // auto_restart = 1
// bitmap display controller settings
bmdc_axi_lites0[0] = (unsigned int)phys_addr; // Bitmap Display Controller 0 start
mt9d111_inf_axis_0[0] = (unsigned int)phys_addr; // Camera Interface start (Address is dummy)
// CMOS Camera initialize, MT9D111
cam_i2c_init(mt9d111_axi_iic);
cam_i2c_write(mt9d111_axi_iic, 0xba, 0xf0, 0x1); // Changed regster map to IFP page 1
cam_i2c_write(mt9d111_axi_iic, 0xba, 0x97, 0x20); // RGB Mode, RGB565
mt9d111_inf_axis_0[1] = 0;
// Initialization of xdmar4resize_gray, xresize_gray, xstraight_conv_nn2_axis2
if(XDmar4resize_gray_Initialize(&xdmar, "dmar4resize_gray_0") != XST_SUCCESS){
fprintf(stderr, "dmar4resize_gray_0 open error\n");
exit(-1);
}
if(XResize_gray_Initialize(&resg, "resize_gray_0") != XST_SUCCESS){
fprintf(stderr, "resize_gray_0 open error\n");
exit(-1);
}
if(XStraight_conv_nn2_axis2_Initialize(&stcnn, "straight_conv_nn2_axis2_0") != XST_SUCCESS){
fprintf(stderr, "straight_conv_nn2_axis2 open error\n");
exit(-1);
}
XDmar4resize_gray_Set_frame_buffer0(&xdmar ,(unsigned int)phys_addr);
XDmar4resize_gray_Set_frame_buffer1(&xdmar ,(unsigned int)phys_addr+ALL_DISP_ADDRESS);
XDmar4resize_gray_Start(&xdmar);
XDmar4resize_gray_EnableAutoRestart(&xdmar);
XResize_gray_Start(&resg);
XResize_gray_EnableAutoRestart(&resg);
XStraight_conv_nn2_axis2_Start(&stcnn);
XStraight_conv_nn2_axis2_EnableAutoRestart(&stcnn);
// Initialization of motor
if (XPwm_Initialize(motorLp, "pwm_0") != XST_SUCCESS){
fprintf(stderr,"pwm_0 (Left) open error\n");
exit(-1);
}
if (XPwm_Initialize(motorRp, "pwm_1") != XST_SUCCESS){
fprintf(stderr,"pwm_1 (Right) open error\n");
exit(-1);
}
// The Motors is rotated in the forward direction.
XPwm_Set_sw_late_V(motorLp, 0);
XPwm_Set_dir_V(motorLp, 1);
XPwm_Set_sw_late_V(motorRp, 0);
XPwm_Set_dir_V(motorRp, 0);
motor_settings(motorLp, motorRp);
// main loop
printf("White line Tracking start. \n");
while(1){
usleep(10000); // 10 ms Wait
while(!XStraight_conv_nn2_axis2_Get_outs_V_vld(&stcnn)) ;
switch((int)XStraight_conv_nn2_axis2_Get_outs_V(&stcnn)){
case 0 : // left turn
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 15);
XPwm_Set_sw_late_V(&motorR, 25);
#endif
#ifdef DEBUG
printf("Left turn\n"); fflush(stdout);
#endif
break;
case 1 : // straight
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 22);
XPwm_Set_sw_late_V(&motorR, 22);
#endif
#ifdef DEBUG
printf("Go straight\n"); fflush(stdout);
#endif
break;
default : // 2, right turn
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 25);
XPwm_Set_sw_late_V(&motorR, 15);
#endif
#ifdef DEBUG
printf("Right turn\n"); fflush(stdout);
#endif
}
}
munmap((void *)bmdc_axi_lites0, 0x10000);
munmap((void *)dmaw4gabor_0, 0x10000);
munmap((void *)mt9d111_inf_axis_0, 0x10000);
munmap((void *)mt9d111_axi_iic, 0x10000);
munmap((void *)axis_switch_0, 0x10000);
munmap((void *)axis_switch_1, 0x10000);
munmap((void *)axi_gpio_0, 0x10000);
munmap((void *)frame_buffer_bmdc, 576000);
close(fd0);
close(fd1);
close(fd2);
close(fd3);
close(fd4);
close(fd5);
close(fd6);
close(fd8);
close(fd9);
return(0);
}
2017年度Zynq+Vivado HLS勉強会概要
2017年度にZynqとVivado HLSの使い方を勉強する勉強会を開きます。回数は半日7回とします。なお資料は
（とりあえず秘密です。。。）
から見ることができます。このURLや資料はお友達やWebに拡散しないようにお願いします。
Windows版のVivado 2017.3（必ずVivado 2017.3をインストールしてください。他のバージョンでは結果が異なります）をインストールし、ZYBOのボードファイルをインストールしてください。ZYBOのボードファイルのインストール方法については、FPGAの部屋のブログの“ZYBO Z7-20 のボードファイルをVivado 2017.2 にインストールする”をご覧ください。この操作を行うと、ZYBOのボードファイルもインストールすることができます。ただし、Vivado 2017.3にインストールしてください。
http://marsee101.blog19.fc2.com/blog-entry-3926.html
第7回ではLinuxを使用してデバイスツリー・ソースをコンパイルします。よって、VirtualBoxかVMwareでUbuntu 16.04をインストールしてください。その際に
sudo apt-get install device-tree-compiler
でデバイスツリー・コンパイラをインストールしてください。
1. 第1回目（2時間程度）No1のフォルダに資料があります。実習はありません
(ア) Zynqの概要
(イ) AXIインターフェース
2. 第2回目（半日程度）資料－No2フォルダ
(ア) Vivado HLS勉強会1（基礎編）（ZYBO実機を使用します）
① Vivado HLSの基本的に使い方を学習します。簡単な乗算回路のIPを作ります。組み合わせ回路を作ります。
② Vivado HLSで作ったIPを使用して、VivadoでIPIを使って乗算回路にしてZYBOで実際に動作させます。
3. 第3回目（半日程度）資料－No3フォルダ
(ア) Vivado HLS勉強会2（レジスタの挿入とPIPELINEディテクティブ）
① 第2回目で作成した乗算回路にレジスタを挿入します。
② パイプライン処理の方法を学習します。
③ Vivado HLSでディスプレイ・コントローラを作ってみます。
4. 第4回（半日程度）資料－No4フォルダ（ZYBO実機を使用します）
(ア) Vivado HLS勉強会3（AXI4 Lite Slave）
① 乗算回路をAXI4 Lite Slaveインターフェース対応にします。
② Vivado HLSで作ったIPを使用して、VivadoでIPIを使って乗算回路にしてZYBOで実際に動作させます。
5. 第5回（半日程度）資料－No5フォルダ
(ア) Vivado HLS勉強会4（AXI4 Master）
① ラプラシアンフィルタを題材にAXI4 Masterの実装方法を学習します。
② ディテクティブやCの構造による性能の違いを学習します。
6. 第6回（半日程度）資料－No6フォルダ
(ア) Vivado HLS勉強会5（AXI4 Stream）＋任意精度型固定小数点データ型＋HLSビデオライブラリ
① 第5回目のラプラシアンフィルタをAXI4 Streamで実装します。AXI4 Streamが一番性能が出やすくお得です。
② 任意精度型固定小数点データ型＋HLSビデオライブラリについて説明します。資料が作れて実習できれば良いのですが、講義だけになってしまうかも？です。
7. 第7回（半日程度）資料－No7フォルダ（ZYBO実機を使用します）
(ア) Vivado HLSのIPをLinuxから使用する（資料は未作成です）
① 第4回目で作成した乗算回路をLinuxから使用する方法を学習します。
② SDKでBOOT.binを作成し、devicetreeやuImageとともにSDカードに書き込みます。
③ SDカードの第2パーティションには私のUbuntu 14.04のRootFSを入れておいて、ZYBO上でUbuntuを起動します。
④ Vivado HLSのドライバを使って乗算回路IPをソフトで制御するためにMakefileを作ってコンパイル実行します。
⑤ LinuxのCMA領域を使用するudmabufについて学習します。
//
// gabor_fil_left_dmaw.c
// Created on: 2016/09/28
// Author: marsee
//
// Refered to http://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2014_4/ug902-vivado-high-level-synthesis.pdf
//
// 2017/10/17 : for ZYBO Z7-20
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#define CMA_START_ADDRESS 0x17800000
#define VIDEO_BUFFER_START_ADDRESS 0x18000000 // Limit 0x18800000, 800*600*4 = 2MBytes * 2
#define HORIZONTAL_PIXEL 800
#define ALL_CHAR_OF_1LINE (HORIZONTAL_PIXEL/8)
#define VERTICAL_PIXEL 600
#define ALL_CHAR_OF_ROW (VERTICAL_PIXEL/8)
#define ALL_DISP_ADDRESS (HORIZONTAL_PIXEL*VERTICAL_PIXEL*4)
#define ALL_DISP_CHARACTOR (HORIZONTAL_PIXEL*VERTICAL_PIXEL)
int main(){
int fd1, fd2, fd3, fd6, fd7, fd9, fd10;
volatile unsigned *axis_switch_0, *axis_switch_1;
volatile unsigned *gabor_filter_lh_0;
volatile unsigned *dmaw4gabor_0;
volatile unsigned *bmdc_axi_lites0;
volatile unsigned *frame_buffer_bmdc;
unsigned char attr[1024];
unsigned long phys_addr;
// axis_switch_0 (UIO2)
fd2 = open("/dev/uio2", O_RDWR); // axis_switch_0 interface AXI4 Lite Slave
if (fd2 < 1){
fprintf(stderr, "/dev/uio2 (axis_switch_0) open error\n");
exit(-1);
}
axis_switch_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd2, 0);
if (!axis_switch_0){
fprintf(stderr, "axis_switch_0 mmap error\n");
exit(-1);
}
// axis_switch_1 (UIO3)
fd3 = open("/dev/uio3", O_RDWR); // axis_switch_1 interface AXI4 Lite Slave
if (fd3 < 1){
fprintf(stderr, "/dev/uio3 (axis_switch_1) open error\n");
exit(-1);
}
axis_switch_1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd3, 0);
if (!axis_switch_1){
fprintf(stderr, "axis_switch_1 mmap error\n");
exit(-1);
}
// gabor_filter_lh_0 (UIO7)
fd7 = open("/dev/uio7", O_RDWR); // gabor_filter_lh_0 interface AXI4 Lite Slave
if (fd7 < 1){
fprintf(stderr, "/dev/uio7 (gabor_filter_lh_0) open error\n");
exit(-1);
}
gabor_filter_lh_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd7, 0);
if (!gabor_filter_lh_0){
fprintf(stderr, "lap_filter_axis_0 mmap error\n");
exit(-1);
}
// dmaw4gabor_0 (UIO1)
fd1 = open("/dev/uio1", O_RDWR); // dmaw4gabor_0 interface AXI4 Lite Slave
if (fd1 < 1){
fprintf(stderr, "/dev/uio1 (dmaw4gabor_0) open error\n");
exit(-1);
}
dmaw4gabor_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!dmaw4gabor_0){
fprintf(stderr, "dmaw4gabor_0 mmap error\n");
exit(-1);
}
// Bitmap Display Controller 0 AXI4 Lite Slave (UIO6)
fd6 = open("/dev/uio6", O_RDWR); // bitmap_display_controller 0 axi4 lite
if (fd6 < 1){
fprintf(stderr, "/dev/uio6 (bitmap_disp_cntrler_axi_master_0) open error\n");
exit(-1);
}
bmdc_axi_lites0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd6, 0);
if (!bmdc_axi_lites0){
fprintf(stderr, "bmdc_axi_lites0 mmap error\n");
exit(-1);
}
// udmabuf0
fd9 = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fd9 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
frame_buffer_bmdc = (volatile unsigned *)mmap(NULL, 5760000, PROT_READ|PROT_WRITE, MAP_SHARED, fd9, 0);
if (!frame_buffer_bmdc){
fprintf(stderr, "frame_buffer_bmdc mmap error\n");
exit(-1);
}
// phys_addr of udmabuf0
fd10 = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd10 == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd10, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd10);
printf("phys_addr = %x\n", (int)phys_addr);
// axis_switch_1, 1to2 ,Select M01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_1[16] = 0x80000000; // 0x40 = 0x80000000; disable
axis_switch_1[17] = 0x80000000; // 0x44 = 0x80000000; disable
axis_switch_1[18] = 0; // 0x48 = 0;
axis_switch_1[0] = 0x2; // 0x0 = 2; Commit registers
// gabor filter AXIS Start
gabor_filter_lh_0[0] = 0x01; // Start bit set
gabor_filter_lh_0[0] = 0x80; // Auto Restart bit set
// axis_switch_0, 2to1, Select S01_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_0[16] = 0x2; // 0x40 = 0x2;
axis_switch_0[0] = 0x2; // 0x0 = 2; Commit registers
// DMA4Gabor frame_buffer1 setting
dmaw4gabor_0[8] = (int)phys_addr + ALL_DISP_ADDRESS; // Data signal of frame_buffer1
// bitmap display controller settings
bmdc_axi_lites0[0] = (int)phys_addr; // Bitmap Display Controller 0 start
munmap((void *)axis_switch_0, 0x10000);
munmap((void *)axis_switch_1, 0x10000);
munmap((void *)gabor_filter_lh_0, 0x10000);
munmap((void *)dmaw4gabor_0, 0x10000);
munmap((void *)bmdc_axi_lites0, 0x10000);
munmap((void *)frame_buffer_bmdc, 576000);
close(fd1);
close(fd2);
close(fd3);
close(fd6);
close(fd7);
close(fd9);
return(0);
}
だが、gabor_fil_right_dmaw.c はbmdc_axi_lites0[0] = (int)phys_addr; // Bitmap Display Controller 0 start
となっている。これは、ガボール・フィルタの左白線検出用パラメータを使用して変換した画像の次のアドレスに右白線検出用パラメータを使用して変換した画像を格納しているからだ。bmdc_axi_lites0[0] = (int)phys_addr + ALL_DISP_ADDRESS; // Bitmap Display Controller 0 start
# ZYBO_Z7-20_u-boot_uImage
Digilent社のZYBO Z7-20のビルド済みのBOOT.bin とdevicetree(devicetree.dtb)です。デバイスツリーのソースコードがzynq_zybo_z7.dtsです。
入っているビットファイルは、ガボール・フィルタ入りの白線走行用畳み込みニューラルネットワークです。いずれもカメラが無いと使用でき無いのが残念です。
http://marsee101.blog19.fc2.com/blog-entry-3943.html
BOOT_Z7_gpio.bin と devicetree_Z7_gpio.dtb の組がAXI GPIO が入ったビットファイルです。デバイスツリーのソースコードがzynq_zybo_z7_gpio.dtsです。
http://marsee101.blog19.fc2.com/blog-entry-3934.html
http://marsee101.blog19.fc2.com/blog-entry-3935.html
uImageがLinuxカーネル(GNU/Linux 3.14.0-xilinx-13567-g906a2c9-dirty armv7l)です。古いですが、最初のテストには良いと思います。対応するu-boot がu-boot_zed.elfです。Zedboard 用のu-bootですが、ZYBO Z7-20で問題なく立ち上がります。
nEnv.txtも必要なので、Linuxカーネルと一緒のSDカードのフォルダに入れておいてください。
RootFSも入れておきたかったのですが、大きくて入りません。私は、Vivado and zybo linux勉強会資料3のUbuntu 14.04のRootFSを使用しています。
https://www.slideshare.net/marsee101/vivado-and-zybo-linux3
後のRootFSは、「BRAVO FPGA」さんの「ZYBO27 (Linux + simple framebuffer でX Windowを動かすまで 2)」
http://bravo-fpga.blogspot.jp/2016/12/zybo27-linux-simple-frame-buffer-x.html
linaro-jessie-alip-20160913-31.tar.gz
https://releases.linaro.org/debian/images/alip-armhf/latest/
でも良いかもしれません。
また、PYNQボードのイメージもBOOT.bin とデバイスツリー、uImageを入れ替えることで動作しました。（ただしVer.1で試しています）
http://pynq.readthedocs.io/en/latest/getting_started.html
//
// cam_capture_bmp.cpp
// 2016/08/19 by marsee
//
// This software converts the left and right of the camera image to BMP file.
// -b : bmp file name
// -n : Start File Number
// -h : help
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <string.h>
#include "bmp_header.h"
#define PIXEL_NUM_OF_BYTES 4
#define SVGA_HORIZONTAL_PIXELS 800
#define SVGA_VERTICAL_LINES 600
#define SVGA_ALL_DISP_ADDRESS (SVGA_HORIZONTAL_PIXELS * SVGA_VERTICAL_LINES * PIXEL_NUM_OF_BYTES)
#define SVGA_3_PICTURES (SVGA_ALL_DISP_ADDRESS * NUMBER_OF_WRITE_FRAMES)
int WriteBMPfile(FILE *fbmp, volatile unsigned int *frame_buffer, BMP24FORMAT **bmp_data);
int main(int argc, char *argv[]){
int opt;
int c, help_flag=0;
char bmp_fn[256] = "bmp_file";
unsigned char attr[1024];
unsigned long phys_addr;
int i, j;
int file_no = 0;
FILE *fbmp;
BMP24FORMAT **bmp_data; // 24 bits Date of BMP files (SVGA_HORIZONTAL_PIXELS * SVGA_VERTICAL_LINES)
while ((opt=getopt(argc, argv, "b:n:h")) != -1){
switch (opt){
case 'b':
strcpy(bmp_fn, optarg);
break;
case 'n':
file_no = atoi(optarg);
break;
case 'h':
help_flag = 1;
break;
}
}
if (help_flag == 1){ // help
printf("Usage : cam_capture_bmp [-b <bmp file name>] [-n <Start File Number>] [-h]\n");
exit(0);
}
// udmabuf0
int fdf = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The cache is disabled.
if (fdf == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
volatile unsigned *frame_buffer = (volatile unsigned *)mmap(NULL, SVGA_ALL_DISP_ADDRESS, PROT_READ|PROT_WRITE, MAP_SHARED, fdf, 0);
if (!frame_buffer){
fprintf(stderr, "frame_buffer mmap error\n");
exit(-1);
}
// phys_addr of udmabuf0
int fdp = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fdp == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fdp, attr, 1024);
sscanf((const char *)attr, "%lx", &phys_addr);
close(fdp);
printf("phys_addr = %x\n", (unsigned int)phys_addr);
// allocated the memory for bmp file
if ((bmp_data=(BMP24FORMAT **)malloc(sizeof(BMP24FORMAT *)*SVGA_VERTICAL_LINES)) == NULL){
fprintf(stderr, "Can not allocate memory of the first dimension of SVGA_VERTICAL_LINES of bmp_data\n");
exit(1);
}
for (i=0; i<SVGA_VERTICAL_LINES; i++){
if ((bmp_data[i]=(BMP24FORMAT *)malloc(sizeof(BMP24FORMAT) * SVGA_HORIZONTAL_PIXELS)) == NULL){
fprintf(stderr, "Can not allocate %d th memory of the first dimension of bmp_data\n", i);
exit(1);
}
}
char bmp_file[256];
// w - writed the left and right eye's bmp files. q - exit.
c = getc(stdin);
while(c != 'q'){
switch ((char)c) {
case 'w' : // w - writed the left and right eye's bmp files.
// writed the left and right eys's frame buffer
sprintf(bmp_file, "%s%d.bmp", bmp_fn, file_no);
if ((fbmp=fopen(bmp_file, "wb")) == NULL){
fprintf(stderr, "Cannot open %s in binary mode\n", bmp_file);
exit(1);
}
WriteBMPfile(fbmp, frame_buffer, bmp_data);
fclose(fbmp);
printf("file No. = %d\n", file_no);
file_no++;
break;
}
c = getc(stdin);
}
for(i=0; i<SVGA_VERTICAL_LINES; i++){
free(bmp_data[i]);
}
free(bmp_data);
munmap((void *)frame_buffer, (SVGA_ALL_DISP_ADDRESS));
close(fdf);
return(0);
}
int WriteBMPfile(FILE *fbmp, volatile unsigned *frame_buffer, BMP24FORMAT **bmp_data){
BITMAPFILEHEADER bmpfh; // file header for a bmp file
BITMAPINFOHEADER bmpih; // INFO header for BMP file
// Copy the camera color data of the bmp_data (data of BMP when its starts from lower left)
for (int i=0; i<SVGA_VERTICAL_LINES; i++){
for (int j=0; j<SVGA_HORIZONTAL_PIXELS; j++){
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].red = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j]>>16)&0xff;
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].green = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j]>>8)&0xff;
bmp_data[(SVGA_VERTICAL_LINES-1)-i][j].blue = (frame_buffer[i*SVGA_HORIZONTAL_PIXELS+j])&0xff;
}
}
// Assign a value to the file header of the BMP file
bmpfh.bfType = 0x4d42;
bmpfh.bfSize = SVGA_HORIZONTAL_PIXELS*SVGA_VERTICAL_LINES*3+54;
bmpfh.bfReserved1 = 0;
bmpfh.bfReserved2 = 0;
bmpfh.bfOffBits = 0x36;
// Assign a value to the INFO header of the BMP file
bmpih.biSize = 0x28;
bmpih.biWidth = SVGA_HORIZONTAL_PIXELS;
bmpih.biHeight = SVGA_VERTICAL_LINES;
bmpih.biPlanes = 0x1;
bmpih.biBitCount = 24;
bmpih.biCompression = 0;
bmpih.biSizeImage = 0;
bmpih.biXPixPerMeter = 3779;
bmpih.biYPixPerMeter = 3779;
bmpih.biClrUsed = 0;
bmpih.biClrImporant = 0;
// Writing of BMP file header
fwrite(&bmpfh.bfType, sizeof(char), 2, fbmp);
fwrite(&bmpfh.bfSize, sizeof(long), 1, fbmp);
fwrite(&bmpfh.bfReserved1, sizeof(short), 1, fbmp);
fwrite(&bmpfh.bfReserved2, sizeof(short), 1, fbmp);
fwrite(&bmpfh.bfOffBits, sizeof(long), 1, fbmp);
// Writing of BMP INFO header
fwrite(&bmpih, sizeof(BITMAPINFOHEADER), 1, fbmp);
// Writing of bmp_data
for (int i=0; i<SVGA_VERTICAL_LINES; i++) {
for (int j=0; j<SVGA_HORIZONTAL_PIXELS; j++) {
fputc((int)bmp_data[i][j].blue, fbmp);
fputc((int)bmp_data[i][j].green, fbmp);
fputc((int)bmp_data[i][j].red, fbmp);
}
}
}
//
// cam_disp_dmaw.c
// Created on: 2016/09/28
// Author: marsee
// 2016/01/23 : udmabuf version
// 2016/08/09 : Gabor Filter version
// 2016/09/28 : DMAW4Gabor version
// 2017/10/17 : for ZYBO Z7-20
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#define CMA_START_ADDRESS 0x17800000
#define VIDEO_BUFFER_START_ADDRESS 0x18000000 // Limit 0x18800000, 800*600*4 = 2MBytes * 2
#define HORIZONTAL_PIXEL 800
#define ALL_CHAR_OF_1LINE (HORIZONTAL_PIXEL/8)
#define VERTICAL_PIXEL 600
#define ALL_CHAR_OF_ROW (VERTICAL_PIXEL/8)
#define ALL_DISP_ADDRESS (HORIZONTAL_PIXEL*VERTICAL_PIXEL*4)
#define ALL_DISP_CHARACTOR (HORIZONTAL_PIXEL*VERTICAL_PIXEL)
void cam_i2c_init(volatile unsigned *mt9d111_axi_iic) {
mt9d111_axi_iic[64] = 0x2; // reset tx fifo ,address is 0x100, i2c_control_reg
mt9d111_axi_iic[64] = 0x1; // enable i2c
}
void cam_i2x_write_sync(void) {
// unsigned c;
// c = *cam_i2c_rx_fifo;
// while ((c & 0x84) != 0x80)
// c = *cam_i2c_rx_fifo; // No Bus Busy and TX_FIFO_Empty = 1
usleep(1000);
}
void cam_i2c_write(volatile unsigned *mt9d111_axi_iic, unsigned int device_addr, unsigned int write_addr, unsigned int write_data){
mt9d111_axi_iic[66] = 0x100 | (device_addr & 0xfe); // Slave IIC Write Address, address is 0x108, i2c_tx_fifo
mt9d111_axi_iic[66] = write_addr;
mt9d111_axi_iic[66] = (write_data >> 8)|0xff; // first data
mt9d111_axi_iic[66] = 0x200 | (write_data & 0xff); // second data
cam_i2x_write_sync();
}
int main()
{
int fd0, fd1, fd2, fd3, fd4, fd5, fd6, fd8, fd9, fd10;
volatile unsigned *bmdc_axi_lites0;
volatile unsigned *dmaw4gabor_0;
volatile unsigned *axis_switch_0, *axis_switch_1;
volatile unsigned *mt9d111_inf_axis_0;
volatile unsigned *mt9d111_axi_iic;
volatile unsigned *axi_gpio_0;
volatile unsigned *frame_buffer_bmdc;
unsigned char attr[1024];
unsigned long phys_addr;
int i;
// Bitmap Display Controller 0 AXI4 Lite Slave (UIO6)
fd6 = open("/dev/uio6", O_RDWR); // bitmap_display_controller 0 axi4 lite
if (fd6 < 1){
fprintf(stderr, "/dev/uio6 (bitmap_disp_cntrler_axi_master_0) open error\n");
exit(-1);
}
bmdc_axi_lites0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd6, 0);
if (!bmdc_axi_lites0){
fprintf(stderr, "bmdc_axi_lites0 mmap error\n");
exit(-1);
}
// dmaw4gabor_0 (UIO1)
fd1 = open("/dev/uio1", O_RDWR); // dmaw4gabor_0 interface AXI4 Lite Slave
if (fd1 < 1){
fprintf(stderr, "/dev/uio1 (dmaw4gabor_0) open error\n");
exit(-1);
}
dmaw4gabor_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!dmaw4gabor_0){
fprintf(stderr, "dmaw4gabor_0 mmap error\n");
exit(-1);
}
// mt9d111 i2c AXI4 Lite Slave (UIO0)
fd0 = open("/dev/uio0", O_RDWR); // mt9d111 i2c AXI4 Lite Slave
if (fd0 < 1){
fprintf(stderr, "/dev/uio0 (mt9d111_axi_iic) open error\n");
exit(-1);
}
mt9d111_axi_iic = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd0, 0);
if (!mt9d111_axi_iic){
fprintf(stderr, "mt9d111_axi_iic mmap error\n");
exit(-1);
}
// mt9d111 inf axis AXI4 Lite Slave (UIO5)
fd5 = open("/dev/uio5", O_RDWR); // mt9d111 inf axis AXI4 Lite Slave
if (fd5 < 1){
fprintf(stderr, "/dev/uio5 (mt9d111_inf_axis_0) open error\n");
exit(-1);
}
mt9d111_inf_axis_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd5, 0);
if (!mt9d111_inf_axis_0){
fprintf(stderr, "mt9d111_inf_axis_0 mmap error\n");
exit(-1);
}
// axis_switch_0 (UIO2)
fd2 = open("/dev/uio2", O_RDWR); // axis_switch_0 interface AXI4 Lite Slave
if (fd2 < 1){
fprintf(stderr, "/dev/uio2 (axis_switch_0) open error\n");
exit(-1);
}
axis_switch_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd2, 0);
if (!axis_switch_0){
fprintf(stderr, "axis_switch_0 mmap error\n");
exit(-1);
}
// axis_switch_1 (UIO3)
fd3 = open("/dev/uio3", O_RDWR); // axis_switch_1 interface AXI4 Lite Slave
if (fd3 < 1){
fprintf(stderr, "/dev/uio3 (axis_switch_1) open error\n");
exit(-1);
}
axis_switch_1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd3, 0);
if (!axis_switch_1){
fprintf(stderr, "axis_switch_1 mmap error\n");
exit(-1);
}
// axi_gpio_0 (UIO8)
fd8 = open("/dev/uio8", O_RDWR); // axi_gpio_0 interface AXI4 Lite Slave
if (fd8 < 1){
fprintf(stderr, "/dev/uio8 (axi_gpio_0) open error\n");
exit(-1);
}
axi_gpio_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd8, 0);
if (!axi_gpio_0){
fprintf(stderr, "axi_gpio_8 mmap error\n");
exit(-1);
}
// udmabuf0
fd9 = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fd9 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
frame_buffer_bmdc = (volatile unsigned *)mmap(NULL, 5760000, PROT_READ|PROT_WRITE, MAP_SHARED, fd9, 0);
if (!frame_buffer_bmdc){
fprintf(stderr, "frame_buffer_bmdc mmap error\n");
exit(-1);
}
// axis_switch_1, 1to2 ,Select M00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_1[16] = 0x0; // 0x40 = 0
axis_switch_1[17] = 0x80000000; // 0x44 = 0x80000000, disable
axis_switch_1[18] = 0x80000000; // 0x48 = 0x80000000, disable
axis_switch_1[0] = 0x2; // Comit registers
// axis_switch_0, 2to1, Select S00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_0[16] = 0x0; // 0x40 = 0;
axis_switch_0[0] = 0x2; // Comit registers
// phys_addr of udmabuf0
fd10 = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd10 == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd10, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd10);
printf("phys_addr = %x\n", (int)phys_addr);
// DMAW4Gabor Initialization sequence
dmaw4gabor_0[6] = (int)phys_addr; // Data signal of frame_buffer0
dmaw4gabor_0[8] = (int)phys_addr; // Data signal of frame_buffer1
dmaw4gabor_0[0] = 0x1; // ap_start = 1
dmaw4gabor_0[0] = 0x80; // auto_restart = 1
// bitmap display controller settings
bmdc_axi_lites0[0] = (int)phys_addr; // Bitmap Display Controller 0 start
mt9d111_inf_axis_0[0] = (int)phys_addr; // Camera Interface start (Address is dummy)
// CMOS Camera initialize, MT9D111
cam_i2c_init(mt9d111_axi_iic);
for (i=0; i<100; i++){
cam_i2c_write(mt9d111_axi_iic, 0xba, 0xf0, 0x1); // Changed regster map to IFP page 1
cam_i2c_write(mt9d111_axi_iic, 0xba, 0x97, 0x20); // RGB Mode, RGB565
}
mt9d111_inf_axis_0[1] = 0;
munmap((void *)bmdc_axi_lites0, 0x10000);
munmap((void *)dmaw4gabor_0, 0x10000);
munmap((void *)mt9d111_inf_axis_0, 0x10000);
munmap((void *)mt9d111_axi_iic, 0x10000);
munmap((void *)axis_switch_0, 0x10000);
munmap((void *)axis_switch_1, 0x10000);
munmap((void *)axi_gpio_0, 0x10000);
munmap((void *)frame_buffer_bmdc, 576000);
close(fd0);
close(fd1);
close(fd2);
close(fd3);
close(fd4);
close(fd5);
close(fd6);
close(fd8);
close(fd9);
return(0);
}
/*
* Device Tree for Zybo Z7 board
* Partially generated by Device Tree Generator 1.1
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
* (C) Copyright 2014 Digilent, Inc.
*
* Michal SIMEK <monstr@monstr.eu>
* Tinghui Wang <steven.wang@digilentinc.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/* for ZYBO Z7 by marsee 2017/09/29 */
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_1;
spi0 = &ps7_qspi_0;
} ;
chosen {
/* bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; */
bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M";
linux,stdout-path = "/amba@0/serial@e0001000";
} ;
cpus {
#address-cells = <1>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
bus-handle = <&ps7_axi_interconnect_0>;
clock-latency = <1000>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
operating-points = <666667 1000000 333334 1000000 >;
/* operating-points = <650000 1000000 >; */
reg = <0x0>;
} ;
ps7_cortexa9_1: cpu@1 {
bus-handle = <&ps7_axi_interconnect_0>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x1>;
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 5 4>, <0 6 4>;
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
reg-names = "cpu0", "cpu1";
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8008000 0x1000>;
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8009000 0x1000>;
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800a000 0x1000>;
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800b000 0x1000>;
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,zynq-ddrc-1.0";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 8 4>;
reg = <0xf8007000 0x100>;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
clock-names = "apb_pclk";
clocks = <&clkc 27>;
compatible = "arm,primecell", "arm,pl330";
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
"dma4", "dma5", "dma6", "dma7";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
reg = <0xf8003000 0x1000>;
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 22 4>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <108333336>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@1 {
compatible = "realtek,RTL8211E";
device_type = "ethernet-phy";
reg = <1>;
} ;
} ;
} ;
ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-global-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 11 0x301>;
reg = <0xf8f00200 0x100>;
} ;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
clocks = <&clkc 42>;
compatible = "xlnx,zynq-gpio-1.0";
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 20 4>;
reg = <0xe000a000 0x1000>;
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = <0xe0200000 0x1000>;
} ;
ps7_ocmc_0: ps7-ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 3 4>;
reg = <0xf800c000 0x1000>;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-level = <2>;
cache-unified ;
compatible = "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 2 4>;
reg = <0xf8f02000 0x1000>;
} ;
ps7_qspi_0: ps7-qspi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,zynq-qspi-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 19 4>;
is-dual = <0>;
num-cs = <1>;
reg = <0xe000d000 0x1000>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-mode = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "n25q128";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <33333333>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0x400000>;
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x400000 0x500000>;
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x900000 0x20000>;
};
partition@qspi-user {
label = "qspi-user";
reg = <0x920000 0x6E0000>;
};
};
} ;
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,ps7-qspi-linear-1.00.a";
reg = <0xfc000000 0x1000000>;
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = <2>;
#interrupt-cells = <3>;
#size-cells = <1>;
compatible = "arm,cortex-a9-gic", "arm,gic";
interrupt-controller ;
num_cpus = <2>;
num_interrupts = <96>;
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 13 0x301>;
reg = <0xf8f00600 0x20>;
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 14 0x301>;
reg = <0xf8f00620 0xe0>;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <33333333>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "arasan,sdhci-8.9a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon";
ranges ;
reg = <0xf8000000 0x1000>;
clkc: clkc@100 {
#clock-cells = <1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1", "uart0", "uart1",
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
ps-clk-frequency = <33333333>;
reg = <0x100 0x100>;
} ;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
clocks = <&clkc 6>;
compatible = "cdns,ttc";
interrupt-names = "ttc0", "ttc1", "ttc2";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
reg = <0xf8001000 0x1000>;
} ;
ps7_uart_1: serial@e0001000 {
clock-names = "uart_clk", "pclk";
clocks = <&clkc 24>, <&clkc 41>;
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 50 4>;
port-number = <0>;
reg = <0xe0001000 0x1000>;
xlnx,has-modem = <0x0>;
} ;
ps7_usb_0: ps7-usb@e0002000 {
clocks = <&clkc 28>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 21 4>;
phy_type = "ulpi";
reg = <0xe0002000 0x1000>;
xlnx,usb-reset = "MIO 46";
} ;
ps7_xadc: ps7-xadc@f8007100 {
clocks = <&clkc 12>;
compatible = "xlnx,zynq-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 7 4>;
reg = <0xf8007100 0x20>;
} ;
mt9d111_axi_iic@0x41600000 {
compatible = "generic-uio";
reg = < 0x41600000 0x10000>;
};
dmaw4gabor_0@43cb0000 {
compatible = "generic-uio";
reg = < 0x43cb0000 0x10000 >;
};
axis_switch_0@0x43c10000 {
compatible = "generic-uio";
reg = < 0x43c10000 0x10000 >;
};
axis_switch_1@0x43c20000 {
compatible = "generic-uio";
reg = < 0x43c20000 0x10000 >;
};
lap_filter_axis_0@0x43c30000 {
compatible = "generic-uio";
reg = < 0x43c30000 0x10000>;
};
mt9d111_inf_axis_0@0x43C40000 {
compatible = "generic-uio";
reg = < 0x43C40000 0x10000>;
};
bitmap_disp_cntrler_axi_master_0@0x43c00000 {
compatible = "generic-uio";
reg = < 0x43c00000 0x10000>;
};
gabor_filter_lh_0@0x43c50000 {
compatible = "generic-uio";
reg = < 0x43c50000 0x10000>;
};
axi_gpio_0@0x41200000 {
compatible = "generic-uio";
reg = < 0x41200000 0x10000>;
};
frame_buffer_bmdc@0x17800000 {
compatible = "generic-uio";
reg = < 0x17800000 0x1000000>;
};
pwm_0@0x43c60000 {
compatible = "generic-uio";
reg = < 0x43c60000 0x10000>;
};
pwm_1@0x43c70000 {
compatible = "generic-uio";
reg = < 0x43c70000 0x10000>;
};
motor_monitor_0@0x43c80000 {
compatible = "generic-uio";
reg = < 0x43c80000 0x10000>;
};
motor_monitor_1@0x43c90000 {
compatible = "generic-uio";
reg = < 0x43c90000 0x10000>;
};
dmar4resize_gray_0@0x43ca0000 {
compatible = "generic-uio";
reg = < 0x43ca0000 0x10000>;
};
rgb2hsv_0@0x43cc0000 {
compatible = "generic-uio";
reg = < 0x43cc0000 0x10000>;
};
ultrasoninc_sensor_inf_0@0x43cd0000 {
compatible = "generic-uio";
reg = < 0x43cd0000 0x10000>;
};
resize_gray_0@0x43ce0000 {
compatible = "generic-uio";
reg = < 0x43ce0000 0x10000>;
};
straight_conv_nn2_axis2_0@0x43cf0000 {
compatible = "generic-uio";
reg = < 0x43cf0000 0x10000>;
};
} ;
} ;
// select_one.cpp
// 2017/10/14 by marsee
//
#include <ap_int.h>
int select_one(
ap_uint<1> a,
ap_uint<1> b,
ap_uint<1> select,
ap_uint<1> &out
){
#pragma HLS INTERFACE ap_none port=out
#pragma HLS INTERFACE s_axilite port=select
#pragma HLS INTERFACE ap_none port=b
#pragma HLS INTERFACE ap_none port=a
#pragma HLS INTERFACE s_axilite port=return
switch(select){
case 0:
out = a;
break;
default:
out = b;
break;
}
return(0);
}
assign out_V = ((select_V[0:0] === 1'b1) ? b_V : a_V);
//------------------------Address Info-------------------
// 0x00 : Control signals
// bit 0 - ap_start (Read/Write/SC)
// bit 1 - ap_done (Read/COR)
// bit 2 - ap_idle (Read)
// bit 3 - ap_ready (Read)
// bit 7 - auto_restart (Read/Write)
// others - reserved
// 0x04 : Global Interrupt Enable Register
// bit 0 - Global Interrupt Enable (Read/Write)
// others - reserved
// 0x08 : IP Interrupt Enable Register (Read/Write)
// bit 0 - Channel 0 (ap_done)
// others - reserved
// 0x0c : IP Interrupt Status Register (Read/TOW)
// bit 0 - Channel 0 (ap_done)
// others - reserved
// 0x10 : Data signal of ap_return
// bit 31~0 - ap_return[31:0] (Read)
// 0x18 : Data signal of select_V
// bit 0 - select_V[0] (Read/Write)
// others - reserved
// 0x1c : reserved
// (SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake)
// bm_disp_cntrler_axi_lite_slave.v
// bitmap_disp_cntrler_axi_master のAXI Lite Slave モジュール。Frame Buffer のスタートアドレス・レジスタを持つ。
//
// Addr 0x0 - frame buffer start address
//
`default_nettype none
module bm_disp_cntrler_axi_lite_slave # (
parameter integer C_S_AXI_LITE_ADDR_WIDTH = 9, // Address width of the AXI Lite Interface
parameter integer C_S_AXI_LITE_DATA_WIDTH = 32, // Data width of the AXI Lite Interface
parameter [31:0] C_DISPLAY_START_ADDRESS = 32'h1A00_0000
)(
input wire s_axi_lite_aclk,
input wire axi_resetn,
// AXI Lite Write Address Channel
input wire s_axi_lite_awvalid,
output wire s_axi_lite_awready,
input wire [C_S_AXI_LITE_ADDR_WIDTH-1: 0] s_axi_lite_awaddr,
// AXI Lite Write Data Channel
input wire s_axi_lite_wvalid,
output wire s_axi_lite_wready,
input wire [C_S_AXI_LITE_DATA_WIDTH-1: 0] s_axi_lite_wdata,
// AXI Lite Write Response Channel
output wire [1:0] s_axi_lite_bresp,
output wire s_axi_lite_bvalid,
input wire s_axi_lite_bready,
// AXI Lite Read Address Channel
input wire s_axi_lite_arvalid,
output wire s_axi_lite_arready,
input wire [C_S_AXI_LITE_ADDR_WIDTH-1: 0] s_axi_lite_araddr,
// AXI Lite Read Data Channel
output wire s_axi_lite_rvalid,
input wire s_axi_lite_rready,
output wire [C_S_AXI_LITE_DATA_WIDTH-1: 0] s_axi_lite_rdata,
output wire [1:0] s_axi_lite_rresp,
output wire [31:0] fb_start_address, // Frame Buffer のスタートアドレス
output reg init_done // PS部の初期化終了
);
// RESP の値の定義
parameter RESP_OKAY = 2'b00;
parameter RESP_EXOKAY = 2'b01;
parameter RESP_SLVERR = 2'b10;
parameter RESP_DECERR = 2'b11;
parameter IDLE_WRA = 1'b0,
ADDR_ASERT = 1'b1;
parameter IDLE_WRD = 1'b0,
BREADY_ASSERT = 1'b1;
parameter IDLE_RD = 1'b0, // for rdt_cs
AR_DATA_WAIT = 1'b1;
reg wrta_cs = IDLE_WRA;
reg wrtd_cs = IDLE_WRD;
reg [31:0] fb_start_addr_reg = C_DISPLAY_START_ADDRESS;
reg rdt_cs = IDLE_RD;
reg reset_1d = 1'b0;
reg reset = 1'b0;
reg awready = 1'b1;
reg bvalid = 1'b0;
reg arready = 1'b1;
reg rvalid = 1'b0;
wire aclk;
assign aclk = s_axi_lite_aclk;
// Synchronization of axi_resetn
always @(posedge aclk) begin
reset_1d <= ~axi_resetn;
reset <= reset_1d;
end
// AXI4 Lite Slave Write Transaction State Machine
always @(posedge aclk) begin
if (reset) begin
wrta_cs <= IDLE_WRA;
awready <= 1'b1;
end else begin
case (wrta_cs)
IDLE_WRA :
if (s_axi_lite_awvalid) begin
wrta_cs <= ADDR_ASERT;
awready <= 1'b0;
end
ADDR_ASERT :
begin
wrta_cs <= IDLE_WRA;
awready <= 1'b1;
end
endcase
end
end
always @(posedge aclk) begin
if (reset) begin
wrtd_cs <= IDLE_WRD;
bvalid <= 1'b0;
end else begin
case (wrtd_cs)
IDLE_WRD :
if (s_axi_lite_wvalid) begin // Write Transaction Start with data
wrtd_cs <= BREADY_ASSERT;
bvalid <= 1'b1;
end
BREADY_ASSERT :
if (s_axi_lite_bready) begin // The write transaction was terminated.
wrtd_cs <= IDLE_WRD;
bvalid <= 1'b0;
end
endcase
end
end
assign s_axi_lite_awready = awready;
assign s_axi_lite_bvalid = bvalid;
assign s_axi_lite_wready = 1'b1;
assign s_axi_lite_bresp = RESP_OKAY;
// AXI4 Lite Slave Read Transaction State Machine
always @(posedge aclk) begin
if (reset) begin
rdt_cs <= IDLE_RD;
arready <= 1'b1;
rvalid <= 1'b0;
end else begin
case (rdt_cs)
IDLE_RD :
if (s_axi_lite_arvalid) begin
rdt_cs <= AR_DATA_WAIT;
arready <= 1'b0;
rvalid <= 1'b1;
end
AR_DATA_WAIT :
if (s_axi_lite_rready) begin
rdt_cs <= IDLE_RD;
arready <= 1'b1;
rvalid <= 1'b0;
end
endcase
end
end
assign s_axi_lite_arready = arready;
assign s_axi_lite_rvalid = rvalid;
assign s_axi_lite_rresp = RESP_OKAY;
// fb_start_addr_reg
always @(posedge aclk) begin
if (reset)
fb_start_addr_reg <= C_DISPLAY_START_ADDRESS;
else
if (s_axi_lite_wvalid)
fb_start_addr_reg <= s_axi_lite_wdata;
end
assign fb_start_address = fb_start_addr_reg;
assign s_axi_lite_rdata = fb_start_addr_reg;
// generated init_done
always @(posedge aclk) begin
if(reset) begin
init_done <= 1'b0;
end else if(wrtd_cs==BREADY_ASSERT) begin
init_done <= 1'b1;
end
end
endmodule
`default_nettype wire
を追加すれば良いようだ。<user_parameter name="CONFIG.PCW_ENET0_GRP_MDIO_IO" value="MIO 52 .. 53" />
/*
* Device Tree for Zybo Z7 board
* Partially generated by Device Tree Generator 1.1
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
* (C) Copyright 2014 Digilent, Inc.
*
* Michal SIMEK <monstr@monstr.eu>
* Tinghui Wang <steven.wang@digilentinc.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/* for ZYBO Z7 by marsee 2017/09/29 */
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_1;
spi0 = &ps7_qspi_0;
} ;
chosen {
/* bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; */
bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M";
linux,stdout-path = "/amba@0/serial@e0001000";
} ;
cpus {
#address-cells = <1>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
bus-handle = <&ps7_axi_interconnect_0>;
clock-latency = <1000>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
/* operating-points = <666667 1000000 >; */
operating-points = <666667 1000000 333334 1000000 >;
/* operating-points = <650000 1000000 >; */
reg = <0x0>;
} ;
ps7_cortexa9_1: cpu@1 {
bus-handle = <&ps7_axi_interconnect_0>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x1>;
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 5 4>, <0 6 4>;
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
reg-names = "cpu0", "cpu1";
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8008000 0x1000>;
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8009000 0x1000>;
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800a000 0x1000>;
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800b000 0x1000>;
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,zynq-ddrc-1.0";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 8 4>;
reg = <0xf8007000 0x100>;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
clock-names = "apb_pclk";
clocks = <&clkc 27>;
compatible = "arm,primecell", "arm,pl330";
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
"dma4", "dma5", "dma6", "dma7";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
reg = <0xf8003000 0x1000>;
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 22 4>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <108333336>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@1 {
compatible = "realtek,RTL8211E";
device_type = "ethernet-phy";
reg = <1>;
} ;
} ;
} ;
ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-global-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 11 0x301>;
reg = <0xf8f00200 0x100>;
} ;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
clocks = <&clkc 42>;
compatible = "xlnx,zynq-gpio-1.0";
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 20 4>;
reg = <0xe000a000 0x1000>;
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = <0xe0200000 0x1000>;
} ;
ps7_ocmc_0: ps7-ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 3 4>;
reg = <0xf800c000 0x1000>;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-level = <2>;
cache-unified ;
compatible = "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 2 4>;
reg = <0xf8f02000 0x1000>;
} ;
ps7_qspi_0: ps7-qspi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,zynq-qspi-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 19 4>;
is-dual = <0>;
num-cs = <1>;
reg = <0xe000d000 0x1000>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-mode = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "n25q128";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <33333333>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0x400000>;
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x400000 0x500000>;
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x900000 0x20000>;
};
partition@qspi-user {
label = "qspi-user";
reg = <0x920000 0x6E0000>;
};
};
} ;
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,ps7-qspi-linear-1.00.a";
reg = <0xfc000000 0x1000000>;
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = <2>;
#interrupt-cells = <3>;
#size-cells = <1>;
compatible = "arm,cortex-a9-gic", "arm,gic";
interrupt-controller ;
num_cpus = <2>;
num_interrupts = <96>;
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 13 0x301>;
reg = <0xf8f00600 0x20>;
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 14 0x301>;
reg = <0xf8f00620 0xe0>;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <33333333>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "arasan,sdhci-8.9a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon";
ranges ;
reg = <0xf8000000 0x1000>;
clkc: clkc@100 {
#clock-cells = <1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1", "uart0", "uart1",
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
ps-clk-frequency = <33333333>;
reg = <0x100 0x100>;
} ;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
clocks = <&clkc 6>;
compatible = "cdns,ttc";
interrupt-names = "ttc0", "ttc1", "ttc2";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
reg = <0xf8001000 0x1000>;
} ;
ps7_uart_1: serial@e0001000 {
clock-names = "uart_clk", "pclk";
clocks = <&clkc 24>, <&clkc 41>;
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 50 4>;
port-number = <0>;
reg = <0xe0001000 0x1000>;
xlnx,has-modem = <0x0>;
} ;
ps7_usb_0: ps7-usb@e0002000 {
clocks = <&clkc 28>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 21 4>;
phy_type = "ulpi";
reg = <0xe0002000 0x1000>;
xlnx,usb-reset = "MIO 46";
} ;
ps7_xadc: ps7-xadc@f8007100 {
clocks = <&clkc 12>;
compatible = "xlnx,zynq-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 7 4>;
reg = <0xf8007100 0x20>;
} ;
axi_gpio_0@0x41200000 {
compatible = "generic-uio";
reg = < 0x41200000 0x10000>;
};
} ;
} ;
In: serial
Out: serial
Err: serial
Net: Gem.e000b000
Hit any key to stop autoboot: 0
Device: zynq_sdhci
Manufacturer ID: 74
OEM: 4a60
Name: USD
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.5 GiB
Bus Width: 4-bit
reading uEnv.txt
117 bytes read in 8 ms (13.7 KiB/s)
Loaded environment from uEnv.txt
Importing environment from SD ...
Running uenvcmd ...
reading uImage
3987160 bytes read in 359 ms (10.6 MiB/s)
reading devicetree.dtb
7510 bytes read in 16 ms (458 KiB/s)
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.14.0-xilinx-13567-g906a2
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3987096 Bytes = 3.8 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x2a00000
Loading Kernel Image ... OK
Loading Device Tree to 1fb2a000, end 1fb2ed55 ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-xilinx-13567-g906a2c9-dirty (masaaki@masaaki-VirtualBox) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-79) ) #9 SMP PREEMPT Sun Oct 5 04:32:36 JST 2014
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Xilinx Zynq
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: CMA: reserved 128 MiB at 27800000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 8 pages/cpu @e6f94000 s10752 r8192 d13824 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624
[ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 895148K/1048576K available (5144K kernel code, 319K rwdata, 1900K rodata, 202K init, 5339K bss, 153428K reserved, 270336K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc06e9600 (7046 kB)
[ 0.000000] .init : 0xc06ea000 - 0xc071ca00 ( 203 kB)
[ 0.000000] .data : 0xc071e000 - 0xc076dde0 ( 320 kB)
[ 0.000000] .bss : 0xc076ddec - 0xc0ca4c88 (5340 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] RCU lockdep checking is enabled.
[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] ps7-slcr mapped to f0004000
[ 0.000000] zynq_clock_init: clkc starts at f0004100
[ 0.000000] Zynq clock init
[ 0.000016] sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 3298534883328ns
[ 0.008534] ps7-ttc #0 at f0006000, irq=43
[ 0.013574] Console: colour dummy device 80x30
[ 0.017942] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.026035] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.030074] ... MAX_LOCK_DEPTH: 48
[ 0.034271] ... MAX_LOCKDEP_KEYS: 8191
[ 0.038716] ... CLASSHASH_SIZE: 4096
[ 0.043094] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.047591] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.052123] ... CHAINHASH_SIZE: 16384
[ 0.056589] memory used by lock dependency info: 3695 kB
[ 0.062068] per task-struct memory footprint: 1152 bytes
[ 0.067555] Calibrating delay loop... 1325.46 BogoMIPS (lpj=6627328)
[ 0.111000] pid_max: default: 32768 minimum: 301
[ 0.116339] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.122921] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.137321] CPU: Testing write buffer coherency: ok
[ 0.143570] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.149243] Setting up static identity map for 0x4de8d0 - 0x4de928
[ 0.155649] L310 cache controller enabled
[ 0.159628] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
[ 0.240418] CPU1: Booted secondary processor
[ 0.328309] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.329408] Brought up 2 CPUs
[ 0.342346] SMP: Total of 2 processors activated.
[ 0.347074] CPU: All CPU(s) started in SVC mode.
[ 0.355037] devtmpfs: initialized
[ 0.365543] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.379590] regulator-dummy: no parameters
[ 0.392323] NET: Registered protocol family 16
[ 0.428391] DMA: preallocated 16384 KiB pool for atomic coherent allocations
[ 0.442048] cpuidle: using governor ladder
[ 0.446050] cpuidle: using governor menu
[ 0.472631] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
[ 0.484996] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.493192] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.499392] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0080000
[ 0.568535] bio: create slab <bio-0> at 0
[ 0.577384] vgaarb: loaded
[ 0.581960] SCSI subsystem initialized
[ 0.588039] usbcore: registered new interface driver usbfs
[ 0.594891] usbcore: registered new interface driver hub
[ 0.600789] usbcore: registered new device driver usb
[ 0.607233] media: Linux media interface: v0.10
[ 0.612157] Linux video capture interface: v2.00
[ 0.617344] pps_core: LinuxPPS API ver. 1 registered
[ 0.622249] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.631764] PTP clock support registered
[ 0.636594] EDAC MC: Ver: 3.0.0
[ 0.642892] Advanced Linux Sound Architecture Driver Initialized.
[ 0.658588] DMA-API: preallocated 4096 debug entries
[ 0.663747] DMA-API: debugging enabled by kernel config
[ 0.669403] Switched to clocksource arm_global_timer
[ 0.730557] NET: Registered protocol family 2
[ 0.737377] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.744709] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
[ 0.755484] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.762079] TCP: reno registered
[ 0.765236] UDP hash table entries: 512 (order: 3, 40960 bytes)
[ 0.771638] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
[ 0.779468] NET: Registered protocol family 1
[ 0.785342] RPC: Registered named UNIX socket transport module.
[ 0.791251] RPC: Registered udp transport module.
[ 0.795922] RPC: Registered tcp transport module.
[ 0.800712] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.808540] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
[ 0.822371] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.832632] bounce pool size: 64 pages
[ 0.840006] jffs2: version 2.2. (NAND) (SUMMARY) c 2001-2006 Red Hat, Inc.
[ 0.847548] msgmni has been set to 1476
[ 0.853004] io scheduler noop registered
[ 0.856828] io scheduler deadline registered
[ 0.861300] io scheduler cfq registered (default)
[ 0.887751] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
[ 0.894803] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
[ 0.906821] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 6249999) is a xuartps
[ 0.916225] console [ttyPS0] enabled
[ 0.916225] console [ttyPS0] enabled
[ 0.923419] bootconsole [earlycon0] disabled
[ 0.923419] bootconsole [earlycon0] disabled
[ 0.934482] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to f0068000
[ 0.944270] [drm] Initialized drm 1.1.0 20060810
[ 0.981505] brd: module loaded
[ 1.003837] loop: module loaded
[ 1.019309] m25p80 spi0.0: found s25fl128s1, expected n25q128
[ 1.025287] m25p80 spi0.0: s25fl128s1 (16384 Kbytes)
[ 1.030370] 4 ofpart partitions found on MTD device spi0.0
[ 1.035774] Creating 4 MTD partitions on "spi0.0":
[ 1.040842] 0x000000000000-0x000000400000 : "qspi-fsbl-uboot"
[ 1.054001] 0x000000400000-0x000000900000 : "qspi-linux"
[ 1.064492] 0x000000900000-0x000000920000 : "qspi-device-tree"
[ 1.075230] 0x000000920000-0x000001000000 : "qspi-user"
[ 1.094622] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
[ 1.100457] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
[ 1.112281] libphy: XEMACPS mii bus: probed
[ 1.118540] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
[ 1.130634] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 1.137556] ehci-pci: EHCI PCI platform driver
[ 1.142717] ULPI transceiver vendor/product ID 0x0424/0x0007
[ 1.148300] Found SMSC USB3320 ULPI transceiver.
[ 1.153119] ULPI integrity check: passed.
[ 1.157939] zynq-ehci zynq-ehci.0: Xilinx Zynq USB EHCI Host Controller
[ 1.165266] zynq-ehci zynq-ehci.0: new USB bus registered, assigned bus number 1
[ 1.199518] zynq-ehci zynq-ehci.0: irq 53, io mem 0x00000000
[ 1.219480] zynq-ehci zynq-ehci.0: USB 2.0 started, EHCI 1.00
[ 1.232043] hub 1-0:1.0: USB hub found
[ 1.236007] hub 1-0:1.0: 1 port detected
[ 1.243897] usbcore: registered new interface driver usb-storage
[ 1.252697] mousedev: PS/2 mouse device common for all mice
[ 1.260374] i2c /dev entries driver
[ 1.272691] zynq-edac f8006000.ps7-ddrc: ecc not enabled
[ 1.278827] cpufreq_cpu0: failed to get cpu0 regulator: -19
[ 1.287208] Xilinx Zynq CpuIdle Driver started
[ 1.293766] sdhci: Secure Digital Host Controller Interface driver
[ 1.299919] sdhci: Copyright(c) Pierre Ossman
[ 1.304210] sdhci-pltfm: SDHCI platform and OF driver helper
[ 1.310403] mmc0: no vqmmc regulator found
[ 1.314426] mmc0: no vmmc regulator found
[ 1.359414] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA
[ 1.374955] usbcore: registered new interface driver usbhid
[ 1.380581] usbhid: USB HID core driver
[ 1.396091] TCP: cubic registered
[ 1.399442] NET: Registered protocol family 17
[ 1.404391] Registering SWP/SWPB emulation handler
[ 1.411704] regulator-dummy: disabling
[ 1.415942] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[ 1.440154] mmc0: new high speed SDHC card at address 59b4
[ 1.448388] mmcblk0: mmc0:59b4 USD 7.51 GiB
[ 1.449867] ALSA device list:
[ 1.449872] No soundcards found.
[ 1.465190] mmcblk0: p1 p2
[ 1.497676] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[ 1.505895] VFS: Mounted root (ext4 filesystem) on device 179:2.
[ 1.524485] devtmpfs: mounted
[ 1.527755] Freeing unused kernel memory: 200K (c06ea000 - c071c000)
Mount failed for selinuxfs on /sys/fs/selinux: No such file or directory
[ 2.382088] init: plymouth-upstart-bridge main process (585) terminated with [ 2.539058] init: ureadahead main process (588) terminated with status 5
[ 2.547168] init: plymouth-upstart-bridge main process (595) terminated with * Starting Mount filesystems on bootbridge main process ended, respawnin[ OK ]
* Starting Signal sysvinit that the rootfs is mounted [ OK ]
* Starting Populate /dev filesystem [ OK ]
* Stopping Populate /dev filesystem [ OK ]
* Starting Clean /tmp directory [ OK ]
* Starting Populate and link to /run filesystem [ OK ]
* Stopping Clean /tmp directory [ OK ]
* Stopping Populate and link to /run filesystem [ OK ]
* Stopping Track if upstart is running in a container [ OK ]
* Starting Initialize or finalize resolvconf [ OK ]
* Starting set console keymap [ OK ]
* Starting Signal sysvinit that virtual filesystems are mounted [ OK ]
* Starting Signal sysvinit that virtual filesystems are mounted [ OK ]
* Stopping set console keymap [ OK ]
* Starting Bridge udev events into upstart [ OK ]
* Starting Signal sysvinit that local filesystems are mounted [ OK ]
* Starting Signal sysvinit that remote filesystems are mounted [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting device node and kernel event manager [ OK ]
* Starting OpenSSH server [ OK ]
* Starting Enabling additional executable binary formats [ OK ]
* Starting flush early job output to logs [ OK ]
* Stopping Mount filesystems on boot [ OK ]
* Starting load modules from /etc/modules [ OK ]
* Starting cold plug devices [ OK ]
* Starting log initial device creation [ OK ]
* Starting D-Bus system message bus [ OK ]
* Stopping flush early job output to logs [ OK ]
* Stopping load modules from /etc/modules [ OK ]
modem-manager[1170]: <info> ModemManager (version 0.5.2.0) starting...
modem-manager[1170]: <info> Loaded plugin MotoC
modem-manager[1170]: <info> Loaded plugin Nokia
modem-manager[1170]: <info> Loaded plugin Novatel
modem-manager[1170]: <info> Loaded plugin X22X
modem-manager[1170]: <info> Loaded plugin Longcheer
modem-manager[1170]: <info> Loaded plugin Linktop
modem-manager[1170]: <info> Loaded plugin Option
* Starting modem connection manager [ OK ]
* Starting configure network device security [ OK ]
modem-manager[1170]: <info> Loaded plugin ZTE
modem-manager[1170]: <info> Loaded plugin SimTech
modem-manager[1170]: <info> Loaded plugin Option High-Speed
modem-manager[1170]: <info> Loaded plugin AnyData
* Stopping cold plug devices [ OK ]
modem-manager[1170]: <info> Loaded plugin Sierra
modem-manager[1170]: <info> Loaded plugin Generic
modem-manager[1170]: <info> Loaded plugin Gobi
* Starting NFSv4 id <-> name mapper [ OK ]
modem-manager[1170]: <info> Loaded plugin Samsung
modem-manager[1170]: <info> Loaded plugin Huawei
modem-manager[1170]: <info> Loaded plugin Wavecom
modem-manager[1170]: <info> Loaded plugin Ericsson MBM
* Stopping log initial device creation [ OK ]
* Starting network connection manager [ OK ]
* Starting enable remaining boot-time encrypted block devices [ OK ]
* Starting configure network device security [ OK ]
* Stopping rpcsec_gss daemon [ OK ]
* Starting system logging daemon [ OK ]
* Stopping enable remaining boot-time encrypted block devices [ OK ]
* Starting userspace bootsplash [ OK ]
* Stopping userspace bootsplash [ OK ]
* Starting Send an event to indicate plymouth is up [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting configure virtual network devices [ OK ]
* Stopping SystemD login management service [ OK ]
* Starting mDNS/DNS-SD daemon [ OK ]
* Starting configure network device security [ OK ]
* Starting configure network device [ OK ]
* Starting Reload cups, upon starting avahi-daemon to make sure remote queues are populated [ OK ]
* Starting CUPS printing spooler/server [ OK ]
* Stopping Send an event to indicate plymouth is up [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Stopping Reload cups, upon starting avahi-daemon to make sure remote queues are populated [ OK ]
* Starting configure network device security [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting configure network device [ OK ]
* Starting Mount network filesystems [ OK ]
* Starting Upstart job to start rpcbind on boot only [ OK ]
* Starting Failsafe Boot Delay [ OK ]
* Stopping Upstart job to start rpcbind on boot only [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Stopping Mount network filesystems [ OK ]
* Starting RPC portmapper replacement [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting NSM status monitor [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting Bridge socket events into upstart [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting Bridge file events into upstart [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting NFSv4 id <-> name mapper [fail]
* Stopping NFSv4 id <-> name mapper [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting bluetooth daemon [ OK ]
* Starting bluetooth daemon [fail]
* Stopping bluetooth daemon [ OK ]
Waiting for network configuration...
Waiting up to 60 more seconds for network configuration...
Booting system without full network configuration...
* Stopping Failsafe Boot Delay [ OK ]
* Starting System V initialisation compatibility [ OK ]
* Setting up X socket directories... [ OK ]
Last login: Thu Jan 1 09:04:11 JST 1970 on ttyPS0
Welcome to Ubuntu 14.04 LTS (GNU/Linux 3.14.0-xilinx-13567-g906a2c9-dirty armv7l)
* Documentation: https://help.ubuntu.com/
* Stopping System V initialisation compatibility [ OK ]
* Not starting NFS kernel daemon: no exports.
speech-dispatcher disabled; edit /etc/default/speech-dispatcher
* Starting System V runlevel compatibility [ OK ]
* Starting automatic crash report generation [ OK ]
* Starting save kernel messages [ OK ]
* Starting anac(h)ronistic cron [ OK ]
* Starting regular background program processing daemon [ OK ]
* Stopping save kernel messages [ OK ]
* Starting NTP server ntpd [ OK ]
saned disabled; edit /etc/default/saned
* Starting crash report submission daemon [ OK ]
* Stopping anac(h)ronistic cron [ OK ]
root@linaro-ubuntu-desktop:~#
だった。クロックが 50 MHz になっているのか？ 33.3333 MHz のはずでは？ps-clk-frequency = <50000000>;
Device: zynq_sdhci
Manufacturer ID: 41
OEM: 3432
Name: SD8GB
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
reading uEnv.txt
117 bytes read in 32 ms (2.9 KiB/s)
Loaded environment from uEnv.txt
Importing environment from SD ...
Running uenvcmd ...
reading uImage
3987160 bytes read in 618 ms (6.2 MiB/s)
reading devicetree.dtb
8898 bytes read in 49 ms (176.8 KiB/s)
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.14.0-xilinx-13567-g906a2
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3987096 Bytes = 3.8 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x2a00000
Loading Kernel Image ... OK
Loading Device Tree to 1fb2a000, end 1fb2f2c1 ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-xilinx-13567-g906a2c9-dirty (masaaki@masaaki-VirtualBox) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-79) ) #9 SMP PREEMPT Sun Oct 5 04:32:36 JST 2014
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Xilinx Zynq
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: CMA: reserved 128 MiB at 27800000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 8 pages/cpu @e6f93000 s10752 r8192 d13824 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624
[ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M
[ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Memory: 895140K/1048576K available (5144K kernel code, 319K rwdata, 1900K rodata, 202K init, 5339K bss, 153436K reserved, 270336K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc06e9600 (7046 kB)
[ 0.000000] .init : 0xc06ea000 - 0xc071ca00 ( 203 kB)
[ 0.000000] .data : 0xc071e000 - 0xc076dde0 ( 320 kB)
[ 0.000000] .bss : 0xc076ddec - 0xc0ca4c88 (5340 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] RCU lockdep checking is enabled.
[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] ps7-slcr mapped to f0004000
[ 0.000000] zynq_clock_init: clkc starts at f0004100
[ 0.000000] Zynq clock init
[ 0.000016] sched_clock: 64 bits at 325MHz, resolution 3ns, wraps every 3383112499200ns
[ 0.005849] ps7-ttc #0 at f0006000, irq=43
[ 0.009605] Console: colour dummy device 80x30
[ 0.012494] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.017935] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.020579] ... MAX_LOCK_DEPTH: 48
[ 0.023370] ... MAX_LOCKDEP_KEYS: 8191
[ 0.026319] ... CLASSHASH_SIZE: 4096
[ 0.029185] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.032148] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.035112] ... CHAINHASH_SIZE: 16384
[ 0.038110] memory used by lock dependency info: 3695 kB
[ 0.041669] per task-struct memory footprint: 1152 bytes
[ 0.045326] Calibrating delay loop... 1292.69 BogoMIPS (lpj=6463488)
[ 0.087410] pid_max: default: 32768 minimum: 301
[ 0.091165] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.095479] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.108717] CPU: Testing write buffer coherency: ok
[ 0.113359] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.117138] Setting up static identity map for 0x4de8d0 - 0x4de928
[ 0.121438] L310 cache controller enabled
[ 0.124031] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
[ 0.207767] CPU1: Booted secondary processor
[ 0.295631] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.296761] Brought up 2 CPUs
[ 0.305276] SMP: Total of 2 processors activated.
[ 0.308443] CPU: All CPU(s) started in SVC mode.
[ 0.314837] devtmpfs: initialized
[ 0.324406] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.336048] regulator-dummy: no parameters
[ 0.347492] NET: Registered protocol family 16
[ 0.382669] DMA: preallocated 16384 KiB pool for atomic coherent allocations
[ 0.394017] cpuidle: using governor ladder
[ 0.396718] cpuidle: using governor menu
[ 0.422083] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
[ 0.443072] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.448345] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.452604] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0080000
[ 0.523125] bio: create slab <bio-0> at 0
[ 0.531087] vgaarb: loaded
[ 0.534733] SCSI subsystem initialized
[ 0.539814] usbcore: registered new interface driver usbfs
[ 0.543830] usbcore: registered new interface driver hub
[ 0.548095] usbcore: registered new device driver usb
[ 0.552891] media: Linux media interface: v0.10
[ 0.556264] Linux video capture interface: v2.00
[ 0.560028] pps_core: LinuxPPS API ver. 1 registered
[ 0.563242] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.569727] PTP clock support registered
[ 0.573274] EDAC MC: Ver: 3.0.0
[ 0.579137] Advanced Linux Sound Architecture Driver Initialized.
[ 0.592650] DMA-API: preallocated 4096 debug entries
[ 0.596027] DMA-API: debugging enabled by kernel config
[ 0.599956] Switched to clocksource arm_global_timer
[ 0.661730] NET: Registered protocol family 2
[ 0.667140] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.672661] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
[ 0.679996] TCP: Hash tables configured (established 8192 bind 8192)
[ 0.684330] TCP: reno registered
[ 0.686425] UDP hash table entries: 512 (order: 3, 40960 bytes)
[ 0.691053] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
[ 0.696670] NET: Registered protocol family 1
[ 0.701209] RPC: Registered named UNIX socket transport module.
[ 0.705053] RPC: Registered udp transport module.
[ 0.708187] RPC: Registered tcp transport module.
[ 0.711387] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.717084] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
[ 0.728321] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.736456] bounce pool size: 64 pages
[ 0.742599] jffs2: version 2.2. (NAND) (SUMMARY) c 2001-2006 Red Hat, Inc.
[ 0.747781] msgmni has been set to 1476
[ 0.751940] io scheduler noop registered
[ 0.754473] io scheduler deadline registered
[ 0.757420] io scheduler cfq registered (default)
[ 0.782564] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
[ 0.787151] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
[ 0.796563] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 3125000) is a xuartps
・
|
・
l 9nnﾟr?n礑nﾟGﾇy?穗・N?` bﾀ
0
Device: zynq_sdhci
Manufacturer ID: 41
OEM: 3432
Name: SD8GB
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
reading uEnv.txt
117 bytes read in 32 ms (2.9 KiB/s)
Loaded environment from uEnv.txt
Importing environment from SD ...
Running uenvcmd ...
reading uImage
3987160 bytes read in 451 ms (8.4 MiB/s)
reading devicetree.dtb
8986 bytes read in 17 ms (515.6 KiB/s)
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.14.0-xilinx-13567-g906a2
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3987096 Bytes = 3.8 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x2a00000
Loading Kernel Image ... OK
Loading Device Tree to 1fb29000, end 1fb2e319 ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 3.14.0-xilinx-13567-g906a2c9-dirty (masaaki@masaaki-VirtualBox) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-79) ) #9 SMP PREEMPT Sun Oct 5 04:32:36 JST 2014
[ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine model: Xilinx Zynq
[ 0.000000] bootconsole [earlycon0] enabled
[ 0.000000] cma: CMA: reserved 128 MiB at 17800000
[ 0.000000] Memory policy: Data cache writealloc
[ 0.000000] PERCPU: Embedded 8 pages/cpu @dfb9d000 s10752 r8192 d13824 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
[ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 375380K/524288K available (5144K kernel code, 319K rwdata, 1900K rodata, 202K init, 5339K bss, 148908K reserved, 0K highmem)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
[ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
[ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
[ 0.000000] .text : 0xc0008000 - 0xc06e9600 (7046 kB)
[ 0.000000] .init : 0xc06ea000 - 0xc071ca00 ( 203 kB)
[ 0.000000] .data : 0xc071e000 - 0xc076dde0 ( 320 kB)
[ 0.000000] .bss : 0xc076ddec - 0xc0ca4c88 (5340 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] RCU lockdep checking is enabled.
[ 0.000000] Dump stacks of tasks blocking RCU-preempt GP.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS:16 nr_irqs:16 16
[ 0.000000] ps7-slcr mapped to e0802000
[ 0.000000] zynq_clock_init: clkc starts at e0802100
[ 0.000000] Zynq clock init
[ 0.000017] sched_clock: 64 bits at 325MHz, resolution 3ns, wraps every 3383112499200ns
[ 0.008496] ps7-ttc #0 at e0804000, irq=43
[ 0.013598] Console: colour dummy device 80x30
[ 0.017938] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.025989] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.030011] ... MAX_LOCK_DEPTH: 48
[ 0.034181] ... MAX_LOCKDEP_KEYS: 8191
[ 0.038602] ... CLASSHASH_SIZE: 4096
[ 0.042953] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.047424] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.051929] ... CHAINHASH_SIZE: 16384
[ 0.056370] memory used by lock dependency info: 3695 kB
[ 0.061820] per task-struct memory footprint: 1152 bytes
[ 0.067261] Calibrating delay loop... 1292.69 BogoMIPS (lpj=6463488)
[ 0.110957] pid_max: default: 32768 minimum: 301
[ 0.116270] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.122813] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.138142] CPU: Testing write buffer coherency: ok
[ 0.144383] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.150024] Setting up static identity map for 0x4de8d0 - 0x4de928
[ 0.156394] L310 cache controller enabled
[ 0.160354] l2x0: 8 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x72760000, Cache size: 512 kB
[ 0.250406] CPU1: Booted secondary processor
[ 0.338277] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.339397] Brought up 2 CPUs
[ 0.352265] SMP: Total of 2 processors activated.
[ 0.356967] CPU: All CPU(s) started in SVC mode.
[ 0.365002] devtmpfs: initialized
[ 0.375675] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[ 0.389839] regulator-dummy: no parameters
[ 0.402682] NET: Registered protocol family 16
[ 0.439399] DMA: preallocated 16384 KiB pool for atomic coherent allocations
[ 0.453225] cpuidle: using governor ladder
[ 0.457203] cpuidle: using governor menu
[ 0.484764] syscon f8000000.ps7-slcr: regmap [mem 0xf8000000-0xf8000fff] registered
[ 0.508444] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.516289] hw-breakpoint: maximum watchpoint size is 4 bytes.
[ 0.522666] zynq-ocm f800c000.ps7-ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0880000
[ 0.594459] bio: create slab <bio-0> at 0
[ 0.604114] vgaarb: loaded
[ 0.608693] SCSI subsystem initialized
[ 0.614863] usbcore: registered new interface driver usbfs
[ 0.620933] usbcore: registered new interface driver hub
[ 0.626675] usbcore: registered new device driver usb
[ 0.633251] media: Linux media interface: v0.10
[ 0.638102] Linux video capture interface: v2.00
[ 0.643340] pps_core: LinuxPPS API ver. 1 registered
[ 0.648179] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.657747] PTP clock support registered
[ 0.662633] EDAC MC: Ver: 3.0.0
[ 0.669012] Advanced Linux Sound Architecture Driver Initialized.
[ 0.684448] DMA-API: preallocated 4096 debug entries
[ 0.689424] DMA-API: debugging enabled by kernel config
[ 0.695085] Switched to clocksource arm_global_timer
[ 0.757968] NET: Registered protocol family 2
[ 0.764864] TCP established hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.773152] TCP bind hash table entries: 4096 (order: 5, 147456 bytes)
[ 0.781239] TCP: Hash tables configured (established 4096 bind 4096)
[ 0.787748] TCP: reno registered
[ 0.790888] UDP hash table entries: 256 (order: 2, 20480 bytes)
[ 0.797204] UDP-Lite hash table entries: 256 (order: 2, 20480 bytes)
[ 0.804693] NET: Registered protocol family 1
[ 0.810667] RPC: Registered named UNIX socket transport module.
[ 0.816522] RPC: Registered udp transport module.
[ 0.821186] RPC: Registered tcp transport module.
[ 0.825953] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.833767] hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available
[ 0.847831] futex hash table entries: 512 (order: 3, 32768 bytes)
[ 0.861473] jffs2: version 2.2. (NAND) (SUMMARY) c 2001-2006 Red Hat, Inc.
[ 0.868997] msgmni has been set to 989
[ 0.874241] io scheduler noop registered
[ 0.878133] io scheduler deadline registered
[ 0.882445] io scheduler cfq registered (default)
[ 0.903720] dma-pl330 f8003000.ps7-dma: Loaded driver for PL330 DMAC-2364208
[ 0.910699] dma-pl330 f8003000.ps7-dma: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
[ 0.922961] e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 82, base_baud = 3125000) is a xuartps
[ 0.932333] console [ttyPS0] enabled
[ 0.932333] console [ttyPS0] enabled
[ 0.939531] bootconsole [earlycon0] disabled
[ 0.939531] bootconsole [earlycon0] disabled
[ 0.950753] xdevcfg f8007000.ps7-dev-cfg: ioremap 0xf8007000 to e0866000
[ 0.960675] [drm] Initialized drm 1.1.0 20060810
[ 0.998880] brd: module loaded
[ 1.021116] loop: module loaded
[ 1.037194] m25p80 spi0.0: found s25fl128s1, expected n25q128
[ 1.042927] m25p80 spi0.0: s25fl128s1 (16384 Kbytes)
[ 1.049045] 4 ofpart partitions found on MTD device spi0.0
[ 1.054455] Creating 4 MTD partitions on "spi0.0":
[ 1.059366] 0x000000000000-0x000000400000 : "qspi-fsbl-uboot"
[ 1.072799] 0x000000400000-0x000000900000 : "qspi-linux"
[ 1.083100] 0x000000900000-0x000000920000 : "qspi-device-tree"
[ 1.094059] 0x000000920000-0x000001000000 : "qspi-user"
[ 1.113823] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
[ 1.119719] e1000e: Copyright(c) 1999 - 2013 Intel Corporation.
[ 1.131592] libphy: XEMACPS mii bus: probed
[ 1.137485] xemacps e000b000.ps7-ethernet: invalid address, use assigned
[ 1.144192] xemacps e000b000.ps7-ethernet: MAC updated b2:92:a9:92:b6:c1
[ 1.151698] xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
[ 1.182104] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 1.189274] ehci-pci: EHCI PCI platform driver
[ 1.196965] zynq-dr e0002000.ps7-usb: Unable to init USB phy, missing?
[ 1.204430] usbcore: registered new interface driver usb-storage
[ 1.213495] mousedev: PS/2 mouse device common for all mice
[ 1.221139] i2c /dev entries driver
[ 1.234527] zynq-edac f8006000.ps7-ddrc: ecc not enabled
[ 1.240840] cpufreq_cpu0: failed to get cpu0 regulator: -19
[ 1.249331] Xilinx Zynq CpuIdle Driver started
[ 1.255628] sdhci: Secure Digital Host Controller Interface driver
[ 1.261731] sdhci: Copyright(c) Pierre Ossman
[ 1.266251] sdhci-pltfm: SDHCI platform and OF driver helper
[ 1.272353] mmc0: no vqmmc regulator found
[ 1.276436] mmc0: no vmmc regulator found
[ 1.315092] mmc0: SDHCI controller on e0100000.ps7-sdio [e0100000.ps7-sdio] using ADMA
[ 1.325652] usbcore: registered new interface driver usbhid
[ 1.331145] usbhid: USB HID core driver
[ 1.342277] TCP: cubic registered
[ 1.345598] NET: Registered protocol family 17
[ 1.350479] Registering SWP/SWPB emulation handler
[ 1.357872] regulator-dummy: disabling
[ 1.362313] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
[ 1.366993] mmc0: new high speed SDHC card at address 0007
[ 1.369586] mmcblk0: mmc0:0007 SD8GB 7.42 GiB
[ 1.375312] mmcblk0: p1 p2
[ 1.408030] ALSA device list:
[ 1.410923] No soundcards found.
[ 1.975967] EXT4-fs (mmcblk0p2): warning: mounting fs with errors, running e2fsck is recommended
[ 1.989786] EXT4-fs (mmcblk0p2): recovery complete
[ 1.999880] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[ 2.008102] VFS: Mounted root (ext4 filesystem) on device 179:2.
[ 2.026996] devtmpfs: mounted
[ 2.030275] Freeing unused kernel memory: 200K (c06ea000 - c071c000)
Mount failed for selinuxfs on /sys/fs/selinux: No such file or directory
[ 2.988694] init: plymouth-upstart-bridge main process (618) terminated with [ 3.135930] init: plymouth-upstart-bridge main process (629) terminated with [ 3.233786] init: ureadahead main process (621) terminated with status 5
* Starting Mount filesystems on boot [ OK ]
* Starting Signal sysvinit that the rootfs is mounted [ OK ]
* Starting Clean /tmp directory [ OK ]
* Starting Populate and link to /run filesystem [ OK ]
* Stopping Clean /tmp directory [ OK ]
* Stopping Populate and link to /run filesystem [ OK ]
* Stopping Track if upstart is running in a container [ OK ]
* Starting Initialize or finalize resolvconf [ OK ]
* Starting set console keymap [ OK ]
* Starting Signal sysvinit that virtual filesystems are mounted [ OK ]
* Starting Signal sysvinit that virtual filesystems are mounted [ OK ]
* Starting Bridge udev events into upstart [ OK ]
* Stopping set console keymap [ OK ]
* Starting Signal sysvinit that local filesystems are mounted [ OK ]
* Starting Signal sysvinit that remote filesystems are mounted [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting device node and kernel event manager [ OK ]
* Starting OpenSSH server [ OK ]
* Starting Enabling additional executable binary formats [ OK ]
* Starting flush early job output to logs [ OK ]
* Stopping Mount filesystems on boot [ OK ]
* Starting cold plug devices [ OK ]
* Starting log initial device creation [ OK ]
* Starting D-Bus system message bus [ OK ]
* Stopping flush early job output to logs [ OK ]
modem-manager[1137]: <info> ModemManager (version 0.5.2.0) starting...
modem-manager[1137]: <info> Loaded plugin Huawei
modem-manager[1137]: <info> Loaded plugin Nokia
modem-manager[1137]: <info> Loaded plugin SimTech
modem-manager[1137]: <info> Loaded plugin Generic
modem-manager[1137]: <info> Loaded plugin Wavecom
modem-manager[1137]: <info> Loaded plugin Linktop
modem-manager[1137]: <info> Loaded plugin Novatel
modem-manager[1137]: <info> Loaded plugin Option
modem-manager[1137]: <info> Loaded plugin X22X
modem-manager[1137]: <info> Loaded plugin Gobi
modem-manager[1137]: <info> Loaded plugin Sierra
modem-manager[1137]: <info> Loaded plugin Option High-Speed
modem-manager[1137]: <info> Loaded plugin ZTE
modem-manager[1137]: <info> Loaded plugin MotoC
modem-manager[1137]: <info> Loaded plugin AnyData
modem-manager[1137]: <info> Loaded plugin Longcheer
modem-manager[1137]: <info> Loaded plugin Samsung
modem-manager[1137]: <info> Loaded plugin Ericsson MBM
* Starting modem connection manager [ OK ]
* Starting configure network device security [ OK ]
* Stopping cold plug devices [ OK ]
* Stopping log initial device creation [ OK ]
* Starting system logging daemon [ OK ]
* Starting network connection manager [ OK ]
* Starting enable remaining boot-time encrypted block devices [ OK ]
* Starting configure network device security [ OK ]
* Stopping rpcsec_gss daemon [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Stopping enable remaining boot-time encrypted block devices [ OK ]
* Starting set console font [ OK ]
* Stopping set console font [ OK ]
* Starting userspace bootsplash [ OK ]
* Starting configure virtual network devices [ OK ]
* Starting mDNS/DNS-SD daemon [ OK ]
* Stopping SystemD login management service [ OK ]
* Stopping userspace bootsplash [ OK ]
* Starting Send an event to indicate plymouth is up [ OK ]
* Starting Reload cups, upon starting avahi-daemon to make sure remote queues are populated [ OK ]
* Starting configure network device security [ OK ]
* Starting configure network device [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Starting System V initialisation compatibility [ OK ]
* Stopping Reload cups, upon starting avahi-daemon to make sure remote queues are populated [ OK ]
* Starting CUPS printing spooler/server [ OK ]
* Setting up X socket directories... [ OK ]
* Starting NFSv4 id <-> name mapper [ OK ]
* Stopping System V initialisation compatibility [ OK ]
Last login: Thu Jan 1 09:00:46 JST 1970 on ttyPS0
Welcome to Ubuntu 14.04 LTS (GNU/Linux 3.14.0-xilinx-13567-g906a2c9-dirty armv7l)
* Documentation: https://help.ubuntu.com/
New release '16.04.3 LTS' available.
Run 'do-release-upgrade' to upgrade to it.
* Not starting NFS kernel daemon: no exports.
speech-dispatcher disabled; edit /etc/default/speech-dispatcher
* Starting System V runlevel compatibility [ OK ]
* Starting automatic crash report generation [ OK ]
* Starting save kernel messages [ OK ]
* Starting configure network device security [ OK ]
* Starting anac(h)ronistic cron [ OK ]
* Starting regular background program processing daemon [ OK ]
* Starting NTP server ntpd * Stopping save kernel messages [ OK ]
root@linaro-ubuntu-desktop:~# [ OK ]
saned disabled; edit /etc/default/saned
root@linaro-ubuntu-desktop:~# logout
Last login: Thu Jan 1 09:00:23 JST 1970 on tty1
Welcome to Ubuntu 14.04 LTS (GNU/Linux 3.14.0-xilinx-13567-g906a2c9-dirty armv7l)
* Documentation: https://help.ubuntu.com/
New release '16.04.3 LTS' available.
Run 'do-release-upgrade' to upgrade to it.
root@linaro-ubuntu-desktop:~#
| 日 | 月 | 火 | 水 | 木 | 金 | 土 |
|---|---|---|---|---|---|---|
| 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| 8 | 9 | 10 | 11 | 12 | 13 | 14 |
| 15 | 16 | 17 | 18 | 19 | 20 | 21 |
| 22 | 23 | 24 | 25 | 26 | 27 | 28 |
| 29 | 30 | 31 | - | - | - | - |