// wl_tracing_cnn.cpp
// 2017/12/27 by marsee
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <string.h>
#include "xpwm.h"
#include "xdmar4resize_gray.h"
#include "xresize_gray.h"
#include "xcurve_conv_nn2_axis3.h"
#define CMA_START_ADDRESS 0x17800000
#define VIDEO_BUFFER_START_ADDRESS 0x18000000 // Limit 0x18800000, 800*600*4 = 2MBytes * 2
#define HORIZONTAL_PIXEL 800
#define ALL_CHAR_OF_1LINE (HORIZONTAL_PIXEL/8)
#define VERTICAL_PIXEL 600
#define ALL_CHAR_OF_ROW (VERTICAL_PIXEL/8)
#define ALL_DISP_ADDRESS (HORIZONTAL_PIXEL*VERTICAL_PIXEL*4)
#define ALL_DISP_CHARACTOR (HORIZONTAL_PIXEL*VERTICAL_PIXEL)
#define DEBUG
//#define MOTOR_OFF
void cam_i2c_init(volatile unsigned *mt9d111_axi_iic) {
mt9d111_axi_iic[64] = 0x2; // reset tx fifo ,address is 0x100, i2c_control_reg
mt9d111_axi_iic[64] = 0x1; // enable i2c
}
void cam_i2x_write_sync(void) {
// unsigned c;
// c = *cam_i2c_rx_fifo;
// while ((c & 0x84) != 0x80)
// c = *cam_i2c_rx_fifo; // No Bus Busy and TX_FIFO_Empty = 1
usleep(1000);
}
void cam_i2c_write(volatile unsigned *mt9d111_axi_iic, unsigned int device_addr, unsigned int write_addr, unsigned int write_data){
mt9d111_axi_iic[66] = 0x100 | (device_addr & 0xfe); // Slave IIC Write Address, address is 0x108, i2c_tx_fifo
mt9d111_axi_iic[66] = write_addr;
mt9d111_axi_iic[66] = (write_data >> 8)|0xff; // first data
mt9d111_axi_iic[66] = 0x200 | (write_data & 0xff); // second data
cam_i2x_write_sync();
}
// Motor
//
void motor_settings(XPwm *motorLp, XPwm *motorRp){
XPwm_DisableAutoRestart(motorLp);
while(!XPwm_IsIdle(motorLp)) ;
XPwm_Start(motorLp);
XPwm_EnableAutoRestart(motorLp);
XPwm_DisableAutoRestart(motorRp);
while(!XPwm_IsIdle(motorRp)) ;
XPwm_Start(motorRp);
XPwm_EnableAutoRestart(motorRp);
}
void Stopped_Zybot(XPwm *motorLp, XPwm *motorRp){
XPwm_Set_sw_late_V(motorLp, 0);
XPwm_Set_sw_late_V(motorRp, 0);
}
int main()
{
int fd0, fd1, fd2, fd3, fd4, fd5, fd6, fd7, fd8, fd9, fd10;
volatile unsigned *bmdc_axi_lites0, *bmdc_axi_lites1;
volatile unsigned *dmaw4gabor_0;
volatile unsigned *axis_switch_0, *axis_switch_1;
volatile unsigned *mt9d111_inf_axis_0;
volatile unsigned *mt9d111_axi_iic;
volatile unsigned *axi_gpio_0;
volatile unsigned *frame_buffer_bmdc;
char attr[1024];
unsigned long phys_addr;
int i;
XDmar4resize_gray xdmar;
XResize_gray resg;
XCurve_conv_nn2_axis3 stcnn;
XPwm motorL, motorR;
XPwm *motorLp, *motorRp;
motorLp = &motorL;
motorRp = &motorR;
// Bitmap Display Controller 0 AXI4 Lite Slave (UIO6)
fd6 = open("/dev/uio6", O_RDWR); // bitmap_display_controller 0 axi4 lite
if (fd6 < 1){
fprintf(stderr, "/dev/uio6 (bitmap_disp_cntrler_axi_master_0) open error\n");
exit(-1);
}
bmdc_axi_lites0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd6, 0);
if (!bmdc_axi_lites0){
fprintf(stderr, "bmdc_axi_lites0 mmap error\n");
exit(-1);
}
// Bitmap Display Controller 1 AXI4 Lite Slave (UIO7)
fd7 = open("/dev/uio7", O_RDWR); // bitmap_display_controller axi4 lite
if (fd7 < 1){
fprintf(stderr, "/dev/uio7 (bitmap_disp_cntrler_axi_master_0) open error\n");
exit(-1);
}
bmdc_axi_lites1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd7, 0);
if (!bmdc_axi_lites1){
fprintf(stderr, "bmdc_axi_lites1 mmap error\n");
exit(-1);
}
// dmaw4gabor_0 (UIO1)
fd1 = open("/dev/uio1", O_RDWR); // dmaw4gabor_0 interface AXI4 Lite Slave
if (fd1 < 1){
fprintf(stderr, "/dev/uio1 (dmaw4gabor_0) open error\n");
exit(-1);
}
dmaw4gabor_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!dmaw4gabor_0){
fprintf(stderr, "dmaw4gabor_0 mmap error\n");
exit(-1);
}
// mt9d111 i2c AXI4 Lite Slave (UIO0)
fd0 = open("/dev/uio0", O_RDWR); // mt9d111 i2c AXI4 Lite Slave
if (fd0 < 1){
fprintf(stderr, "/dev/uio0 (mt9d111_axi_iic) open error\n");
exit(-1);
}
mt9d111_axi_iic = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd0, 0);
if (!mt9d111_axi_iic){
fprintf(stderr, "mt9d111_axi_iic mmap error\n");
exit(-1);
}
// mt9d111 inf axis AXI4 Lite Slave (UIO5)
fd5 = open("/dev/uio5", O_RDWR); // mt9d111 inf axis AXI4 Lite Slave
if (fd5 < 1){
fprintf(stderr, "/dev/uio5 (mt9d111_inf_axis_0) open error\n");
exit(-1);
}
mt9d111_inf_axis_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd5, 0);
if (!mt9d111_inf_axis_0){
fprintf(stderr, "mt9d111_inf_axis_0 mmap error\n");
exit(-1);
}
// axis_switch_0 (UIO2)
fd2 = open("/dev/uio2", O_RDWR); // axis_switch_0 interface AXI4 Lite Slave
if (fd2 < 1){
fprintf(stderr, "/dev/uio2 (axis_switch_0) open error\n");
exit(-1);
}
axis_switch_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd2, 0);
if (!axis_switch_0){
fprintf(stderr, "axis_switch_0 mmap error\n");
exit(-1);
}
// axis_switch_1 (UIO3)
fd3 = open("/dev/uio3", O_RDWR); // axis_switch_1 interface AXI4 Lite Slave
if (fd3 < 1){
fprintf(stderr, "/dev/uio3 (axis_switch_1) open error\n");
exit(-1);
}
axis_switch_1 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd3, 0);
if (!axis_switch_1){
fprintf(stderr, "axis_switch_1 mmap error\n");
exit(-1);
}
// axi_gpio_0 (UIO8)
fd8 = open("/dev/uio8", O_RDWR); // axi_gpio_0 interface AXI4 Lite Slave
if (fd8 < 1){
fprintf(stderr, "/dev/uio8 (axi_gpio_0) open error\n");
exit(-1);
}
axi_gpio_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd8, 0);
if (!axi_gpio_0){
fprintf(stderr, "axi_gpio_8 mmap error\n");
exit(-1);
}
// udmabuf0
fd9 = open("/dev/udmabuf0", O_RDWR | O_SYNC); // frame_buffer, The chache is disabled.
if (fd9 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
frame_buffer_bmdc = (volatile unsigned *)mmap(NULL, 5760000, PROT_READ|PROT_WRITE, MAP_SHARED, fd9, 0);
if (!frame_buffer_bmdc){
fprintf(stderr, "frame_buffer_bmdc mmap error\n");
exit(-1);
}
// axis_switch_1, 1to2 ,Select M00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_1[16] = 0x0; // 0x40 = 0
axis_switch_1[17] = 0x80000000; // 0x44 = 0x80000000, disable
axis_switch_1[18] = 0x80000000; // 0x48 = 0x80000000, disable
axis_switch_1[19] = 0x80000000; // 0x4C = 0x80000000, disable
axis_switch_1[0] = 0x2; // Comit registers
// axis_switch_0, 2to1, Select S00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
axis_switch_0[16] = 0x0; // 0x40 = 0;
axis_switch_0[0] = 0x2; // Comit registers
// phys_addr of udmabuf0
fd10 = open("/sys/devices/virtual/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd10 == -1){
fprintf(stderr, "/sys/devices/virtual/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd10, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd10);
printf("phys_addr = %x\n", (int)phys_addr);
// DMAW4Gabor Initialization sequence
dmaw4gabor_0[6] = (unsigned int)phys_addr; // Data signal of frame_buffer0
dmaw4gabor_0[8] = (unsigned int)phys_addr+ALL_DISP_ADDRESS; // Data signal of frame_buffer1
dmaw4gabor_0[0] = 0x1; // ap_start = 1
dmaw4gabor_0[0] = 0x80; // auto_restart = 1
// bitmap display controller settings
bmdc_axi_lites0[0] = (unsigned int)phys_addr; // Bitmap Display Controller 0 start
bmdc_axi_lites1[0] = (unsigned int)phys_addr; // Bitmap Display Controller 1 start
mt9d111_inf_axis_0[0] = (unsigned int)phys_addr; // Camera Interface start (Address is dummy)
// CMOS Camera initialize, MT9D111
cam_i2c_init(mt9d111_axi_iic);
cam_i2c_write(mt9d111_axi_iic, 0xba, 0xf0, 0x1); // Changed regster map to IFP page 1
cam_i2c_write(mt9d111_axi_iic, 0xba, 0x97, 0x20); // RGB Mode, RGB565
mt9d111_inf_axis_0[1] = 0;
// Initialization of xdmar4resize_gray, xresize_gray, XCurve_conv_nn2_axis3
if(XDmar4resize_gray_Initialize(&xdmar, "dmar4resize_gray_0") != XST_SUCCESS){
fprintf(stderr, "dmar4resize_gray_0 open error\n");
exit(-1);
}
if(XResize_gray_Initialize(&resg, "resize_gray_0") != XST_SUCCESS){
fprintf(stderr, "resize_gray_0 open error\n");
exit(-1);
}
if(XCurve_conv_nn2_axis3_Initialize(&stcnn, "curve_conv_nn2_axis3_0") != XST_SUCCESS){
fprintf(stderr, "curve_conv_nn2_axis3 open error\n");
exit(-1);
}
XDmar4resize_gray_Set_frame_buffer0(&xdmar ,(unsigned int)phys_addr);
XDmar4resize_gray_Set_frame_buffer1(&xdmar ,(unsigned int)phys_addr+ALL_DISP_ADDRESS);
XDmar4resize_gray_Start(&xdmar);
XDmar4resize_gray_EnableAutoRestart(&xdmar);
XResize_gray_Start(&resg);
XResize_gray_EnableAutoRestart(&resg);
XCurve_conv_nn2_axis3_Start(&stcnn);
XCurve_conv_nn2_axis3_EnableAutoRestart(&stcnn);
// Initialization of motor
if (XPwm_Initialize(motorLp, "pwm_0") != XST_SUCCESS){
fprintf(stderr,"pwm_0 (Left) open error\n");
exit(-1);
}
if (XPwm_Initialize(motorRp, "pwm_1") != XST_SUCCESS){
fprintf(stderr,"pwm_1 (Right) open error\n");
exit(-1);
}
// The Motors is rotated in the forward direction.
XPwm_Set_sw_late_V(motorLp, 0);
XPwm_Set_dir_V(motorLp, 1);
XPwm_Set_sw_late_V(motorRp, 0);
XPwm_Set_dir_V(motorRp, 0);
motor_settings(motorLp, motorRp);
// main loop
printf("White line Tracking start. \n");
while(1){
usleep(10000); // 10 ms Wait
while(!XCurve_conv_nn2_axis3_Get_outs_V_vld(&stcnn)) ;
switch((int)XCurve_conv_nn2_axis3_Get_outs_V(&stcnn)){
case 0 : // left turn
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 10);
XPwm_Set_sw_late_V(&motorR, 25);
#endif
#ifdef DEBUG
printf("Left turn\n"); fflush(stdout);
#endif
break;
case 1 : // straight
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 20);
XPwm_Set_sw_late_V(&motorR, 20);
#endif
#ifdef DEBUG
printf("Go straight\n"); fflush(stdout);
#endif
break;
default : // 2, right turn
#ifndef MOTOR_OFF
XPwm_Set_sw_late_V(&motorL, 25);
XPwm_Set_sw_late_V(&motorR, 10);
#endif
#ifdef DEBUG
printf("Right turn\n"); fflush(stdout);
#endif
}
}
munmap((void *)bmdc_axi_lites0, 0x10000);
munmap((void *)bmdc_axi_lites1, 0x10000);
munmap((void *)dmaw4gabor_0, 0x10000);
munmap((void *)mt9d111_inf_axis_0, 0x10000);
munmap((void *)mt9d111_axi_iic, 0x10000);
munmap((void *)axis_switch_0, 0x10000);
munmap((void *)axis_switch_1, 0x10000);
munmap((void *)axi_gpio_0, 0x10000);
munmap((void *)frame_buffer_bmdc, 576000);
close(fd0);
close(fd1);
close(fd2);
close(fd3);
close(fd4);
close(fd5);
close(fd6);
close(fd7);
close(fd8);
close(fd9);
return(0);
}
# Makefile(wl_tracing_cnn)
# Referred to http://www.ie.u-ryukyu.ac.jp/~e085739/c.makefile.tuts.html
PROGRAM = wl_tracing_cnn
OBJS = wl_tracing_cnn.o xpwm_linux.o xpwm.o xdmar4resize_gray_linux.o xdmar4resize_gray.o xresize_gray_linux.o xresize_gray.o xcurve_conv_nn2_axis3_linux.o xcurve_conv_nn2_axis3.o
CC = gcc
CFLAGS = -Wall -O2
.SUFFIXES: .c .o
.PHONY: all
all: wl_tracing_cnn
wl_tracing_cnn: $(OBJS)
$(CC) -Wall -o $@ $(OBJS)
.c.o:
$(CC) $(CFLAGS) -c $<
.PHONY: clean
clean:
$(RM) $(PROGRAM) $(OBJS)
/*
* Device Tree for Zybo board
* Partially generated by Device Tree Generator 1.1
*
* (C) Copyright 2007-2013 Xilinx, Inc.
* (C) Copyright 2007-2013 Michal Simek
* (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
* (C) Copyright 2014 Digilent, Inc.
*
* Michal SIMEK <monstr@monstr.eu>
* Tinghui Wang <steven.wang@digilentinc.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
model = "Xilinx Zynq";
aliases {
ethernet0 = &ps7_ethernet_0;
serial0 = &ps7_uart_1;
spi0 = &ps7_qspi_0;
} ;
chosen {
/* bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; */
bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 coherent_pool=16M";
linux,stdout-path = "/amba@0/serial@e0001000";
} ;
cpus {
#address-cells = <1>;
#size-cells = <0>;
ps7_cortexa9_0: cpu@0 {
bus-handle = <&ps7_axi_interconnect_0>;
clock-latency = <1000>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
/* operating-points = <666667 1000000 333334 1000000 >; */
operating-points = <650000 1000000 >;
reg = <0x0>;
} ;
ps7_cortexa9_1: cpu@1 {
bus-handle = <&ps7_axi_interconnect_0>;
clocks = <&clkc 3>;
compatible = "arm,cortex-a9";
device_type = "cpu";
interrupt-handle = <&ps7_scugic_0>;
reg = <0x1>;
} ;
} ;
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 5 4>, <0 6 4>;
reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
reg-names = "cpu0", "cpu1";
} ;
ps7_ddr_0: memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ranges ;
ps7_afi_0: ps7-afi@f8008000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8008000 0x1000>;
} ;
ps7_afi_1: ps7-afi@f8009000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf8009000 0x1000>;
} ;
ps7_afi_2: ps7-afi@f800a000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800a000 0x1000>;
} ;
ps7_afi_3: ps7-afi@f800b000 {
compatible = "xlnx,ps7-afi-1.00.a";
reg = <0xf800b000 0x1000>;
} ;
ps7_ddrc_0: ps7-ddrc@f8006000 {
compatible = "xlnx,zynq-ddrc-1.0";
reg = <0xf8006000 0x1000>;
xlnx,has-ecc = <0x0>;
} ;
ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
compatible = "xlnx,zynq-devcfg-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 8 4>;
reg = <0xf8007000 0x100>;
} ;
ps7_dma_s: ps7-dma@f8003000 {
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <4>;
clock-names = "apb_pclk";
clocks = <&clkc 27>;
compatible = "arm,primecell", "arm,pl330";
interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
"dma4", "dma5", "dma6", "dma7";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
reg = <0xf8003000 0x1000>;
} ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 22 4>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <108333336>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@1 {
compatible = "realtek,RTL8211E";
device_type = "ethernet-phy";
reg = <1>;
} ;
} ;
} ;
ps7_globaltimer_0: ps7-globaltimer@f8f00200 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-global-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 11 0x301>;
reg = <0xf8f00200 0x100>;
} ;
ps7_gpio_0: ps7-gpio@e000a000 {
#gpio-cells = <2>;
clocks = <&clkc 42>;
compatible = "xlnx,zynq-gpio-1.0";
emio-gpio-width = <64>;
gpio-controller ;
gpio-mask-high = <0xc0000>;
gpio-mask-low = <0xfe81>;
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 20 4>;
reg = <0xe000a000 0x1000>;
} ;
ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
compatible = "xlnx,ps7-iop-bus-config-1.00.a";
reg = <0xe0200000 0x1000>;
} ;
ps7_ocmc_0: ps7-ocmc@f800c000 {
compatible = "xlnx,zynq-ocmc-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 3 4>;
reg = <0xf800c000 0x1000>;
} ;
ps7_pl310_0: ps7-pl310@f8f02000 {
arm,data-latency = <3 2 2>;
arm,tag-latency = <2 2 2>;
cache-level = <2>;
cache-unified ;
compatible = "arm,pl310-cache";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 2 4>;
reg = <0xf8f02000 0x1000>;
} ;
ps7_qspi_0: ps7-qspi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,zynq-qspi-1.0";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 19 4>;
is-dual = <0>;
num-cs = <1>;
reg = <0xe000d000 0x1000>;
xlnx,fb-clk = <0x1>;
xlnx,qspi-mode = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "n25q128";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0x400000>;
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x400000 0x500000>;
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x900000 0x20000>;
};
partition@qspi-user {
label = "qspi-user";
reg = <0x920000 0x6E0000>;
};
};
} ;
ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,ps7-qspi-linear-1.00.a";
reg = <0xfc000000 0x1000000>;
} ;
ps7_scugic_0: ps7-scugic@f8f01000 {
#address-cells = <2>;
#interrupt-cells = <3>;
#size-cells = <1>;
compatible = "arm,cortex-a9-gic", "arm,gic";
interrupt-controller ;
num_cpus = <2>;
num_interrupts = <96>;
reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
} ;
ps7_scutimer_0: ps7-scutimer@f8f00600 {
clocks = <&clkc 4>;
compatible = "arm,cortex-a9-twd-timer";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 13 0x301>;
reg = <0xf8f00600 0x20>;
} ;
ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
clocks = <&clkc 4>;
compatible = "xlnx,ps7-scuwdt-1.00.a";
device_type = "watchdog";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <1 14 0x301>;
reg = <0xf8f00620 0xe0>;
} ;
ps7_sd_0: ps7-sdio@e0100000 {
clock-frequency = <50000000>;
clock-names = "clk_xin", "clk_ahb";
clocks = <&clkc 21>, <&clkc 32>;
compatible = "arasan,sdhci-8.9a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 24 4>;
reg = <0xe0100000 0x1000>;
xlnx,has-cd = <0x1>;
xlnx,has-power = <0x0>;
xlnx,has-wp = <0x1>;
} ;
ps7_slcr_0: ps7-slcr@f8000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon";
ranges ;
reg = <0xf8000000 0x1000>;
clkc: clkc@100 {
#clock-cells = <1>;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
"lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0",
"can1", "sdio0", "sdio1", "uart0", "uart1",
"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
"swdt", "dbg_trc", "dbg_apb";
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
ps-clk-frequency = <50000000>;
reg = <0x100 0x100>;
} ;
} ;
ps7_ttc_0: ps7-ttc@f8001000 {
clocks = <&clkc 6>;
compatible = "cdns,ttc";
interrupt-names = "ttc0", "ttc1", "ttc2";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
reg = <0xf8001000 0x1000>;
} ;
ps7_uart_1: serial@e0001000 {
clock-names = "uart_clk", "pclk";
clocks = <&clkc 24>, <&clkc 41>;
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
current-speed = <115200>;
device_type = "serial";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 50 4>;
port-number = <0>;
reg = <0xe0001000 0x1000>;
xlnx,has-modem = <0x0>;
} ;
ps7_usb_0: ps7-usb@e0002000 {
clocks = <&clkc 28>;
compatible = "xlnx,ps7-usb-1.00.a", "xlnx,zynq-usb-1.00.a";
dr_mode = "host";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 21 4>;
phy_type = "ulpi";
reg = <0xe0002000 0x1000>;
xlnx,usb-reset = "MIO 46";
} ;
ps7_xadc: ps7-xadc@f8007100 {
clocks = <&clkc 12>;
compatible = "xlnx,zynq-xadc-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 7 4>;
reg = <0xf8007100 0x20>;
} ;
mt9d111_axi_iic@0x41600000 {
compatible = "generic-uio";
reg = < 0x41600000 0x10000>;
};
dmaw4gabor_0@43cb0000 {
compatible = "generic-uio";
reg = < 0x43cb0000 0x10000 >;
};
axis_switch_0@0x43c10000 {
compatible = "generic-uio";
reg = < 0x43c10000 0x10000 >;
};
axis_switch_1@0x43c20000 {
compatible = "generic-uio";
reg = < 0x43c20000 0x10000 >;
};
lap_filter_axis_0@0x43c30000 {
compatible = "generic-uio";
reg = < 0x43c30000 0x10000>;
};
mt9d111_inf_axis_0@0x43C40000 {
compatible = "generic-uio";
reg = < 0x43C40000 0x10000>;
};
bitmap_disp_cntrler_axi_master_0@0x43c00000 {
compatible = "generic-uio";
reg = < 0x43c00000 0x10000>;
};
bitmap_disp_cntrler_axi_master_1@0x43c50000 {
compatible = "generic-uio";
reg = < 0x43c50000 0x10000>;
};
axi_gpio_0@0x41200000 {
compatible = "generic-uio";
reg = < 0x41200000 0x10000>;
};
frame_buffer_bmdc@0x17800000 {
compatible = "generic-uio";
reg = < 0x17800000 0x1000000>;
};
pwm_0@0x43c60000 {
compatible = "generic-uio";
reg = < 0x43c60000 0x10000>;
};
pwm_1@0x43c70000 {
compatible = "generic-uio";
reg = < 0x43c70000 0x10000>;
};
motor_monitor_0@0x43c80000 {
compatible = "generic-uio";
reg = < 0x43c80000 0x10000>;
};
motor_monitor_1@0x43c90000 {
compatible = "generic-uio";
reg = < 0x43c90000 0x10000>;
};
dmar4resize_gray_0@0x43ca0000 {
compatible = "generic-uio";
reg = < 0x43ca0000 0x10000>;
};
rgb2hsv_0@0x43cc0000 {
compatible = "generic-uio";
reg = < 0x43cc0000 0x10000>;
};
ultrasoninc_sensor_inf_0@0x43cd0000 {
compatible = "generic-uio";
reg = < 0x43cd0000 0x10000>;
};
resize_gray_0@0x43ce0000 {
compatible = "generic-uio";
reg = < 0x43ce0000 0x10000>;
};
curve_conv_nn2_axis3_0@0x43cf0000 {
compatible = "generic-uio";
reg = < 0x43cf0000 0x10000>;
};
} ;
} ;
/* * wl_tracing_cnn.c * * Created on: 2017/09/18 * Author: Masaaki */
// ベアメタル・アプリケーションでは、CNN がきちんと動作しているを確認するのみとする
// なお、このアプリケーションはcam_disp3_axis.c を起動してカメラを表示状態にした後で起動する
// 2017/09/19 : 直進、左旋回、右旋回の各出力の値を表示するように変更
// 2017/12/12 : カーブ対応に更新
//
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include "xil_io.h"
#include "xparameters.h"
#include "sleep.h"
#include "xdmaw4gabor.h"
#include "xdmar4resize_gray.h"
#include "xresize_gray.h"
#include "xcurve_conv_nn2_axis3.h"
#define NUMBER_OF_WRITE_FRAMES 3 // Note: If not at least 3 or more, the image is not displayed in succession.
#define HORIZONTAL_PIXELS 800
#define VERTICAL_LINES 600
#define PIXEL_NUM_OF_BYTES 4
#define FRAME_BUFFER_ADDRESS 0x10000000
#define ALL_DISP_ADDRESS (HORIZONTAL_PIXELS*VERTICAL_LINES*PIXEL_NUM_OF_BYTES)
void cam_i2c_init(volatile unsigned *mt9d111_i2c_axi_lites) {
mt9d111_i2c_axi_lites[64] = 0x2; // reset tx fifo ,address is 0x100, i2c_control_reg
mt9d111_i2c_axi_lites[64] = 0x1; // enable i2c
}
void cam_i2x_write_sync(void) {
// unsigned c;
// c = *cam_i2c_rx_fifo;
// while ((c & 0x84) != 0x80)
// c = *cam_i2c_rx_fifo; // No Bus Busy and TX_FIFO_Empty = 1
usleep(1000);
}
void cam_i2c_write(volatile unsigned *mt9d111_i2c_axi_lites, unsigned int device_addr, unsigned int write_addr, unsigned int write_data){
mt9d111_i2c_axi_lites[66] = 0x100 | (device_addr & 0xfe); // Slave IIC Write Address, address is 0x108, i2c_tx_fifo
mt9d111_i2c_axi_lites[66] = write_addr;
mt9d111_i2c_axi_lites[66] = (write_data >> 8)|0xff; // first data
mt9d111_i2c_axi_lites[66] = 0x200 | (write_data & 0xff); // second data
cam_i2x_write_sync();
}
int main(){
XDmar4resize_gray xdmar;
XResize_gray resg;
XCurve_conv_nn2_axis3 stcnn;
XDmaw4gabor xdma4g;
int i;
uint32_t res;
int result[4];
// axis_switch_1, 1to2 ,Select M00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_1_BASEADDR+0x40), 0x0);
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_1_BASEADDR+0x44), 0x80000000); // disable
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_1_BASEADDR+0x48), 0x80000000); // disable
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_1_BASEADDR), 0x2); // Commit registers
// axis_switch_0, 2to1, Select S00_AXIS
// Refer to http://marsee101.blog19.fc2.com/blog-entry-3177.html
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_0_BASEADDR+0x40), 0x0);
Xil_Out32((XPAR_CAMERA_INTERFACE_AXIS_SWITCH_0_BASEADDR), 0x2); // Commit registers
XDmaw4gabor_Initialize(&xdma4g, 0);
XDmaw4gabor_Set_frame_buffer0(&xdma4g, FRAME_BUFFER_ADDRESS);
XDmaw4gabor_Set_frame_buffer1(&xdma4g, FRAME_BUFFER_ADDRESS+ALL_DISP_ADDRESS);
XDmaw4gabor_Start(&xdma4g);
XDmaw4gabor_EnableAutoRestart(&xdma4g);
// mt9d111_inf_axis_0, axi_iic_0, bitmap_disp_cntrler_axi_master_0
volatile unsigned int *bmdc0_axi_lites;
volatile unsigned int *bmdc1_axi_lites;
volatile unsigned int *mt9d111_axi_lites;
volatile unsigned int *mt9d111_i2c_axi_lites;
bmdc0_axi_lites = (volatile unsigned *)XPAR_BITMAP_DISP_CNTRLER_AXI_MASTER_0_BASEADDR;
bmdc1_axi_lites = (volatile unsigned *)XPAR_BITMAP_DISP_CNTRLER_AXI_MASTER_1_BASEADDR;
mt9d111_axi_lites = (volatile unsigned *)XPAR_CAMERA_INTERFACE_MT9D111_INF_AXIS_0_BASEADDR;
mt9d111_i2c_axi_lites = (volatile unsigned *)XPAR_CAMERA_INTERFACE_AXI_IIC_0_BASEADDR;
bmdc0_axi_lites[0] = (volatile unsigned int)FRAME_BUFFER_ADDRESS; // Bitmap Display Controller 0 start
bmdc1_axi_lites[0] = (volatile unsigned int)FRAME_BUFFER_ADDRESS; // Bitmap Display Controller 1 start
mt9d111_axi_lites[0] = (volatile unsigned int)FRAME_BUFFER_ADDRESS; // Camera Interface start (Address is dummy)
// CMOS Camera initialize, MT9D111
cam_i2c_init(mt9d111_i2c_axi_lites);
cam_i2c_write(mt9d111_i2c_axi_lites, 0xba, 0xf0, 0x1); // Changed regster map to IFP page 1
cam_i2c_write(mt9d111_i2c_axi_lites, 0xba, 0x97, 0x20); // RGB Mode, RGB565
mt9d111_axi_lites[1] = 0; // One_shot_mode is disabled
XDmar4resize_gray_Initialize(&xdmar, 0);
XResize_gray_Initialize(&resg, 0);
XCurve_conv_nn2_axis3_Initialize(&stcnn, 0);
XDmar4resize_gray_Set_frame_buffer0(&xdmar ,FRAME_BUFFER_ADDRESS);
XDmar4resize_gray_Set_frame_buffer1(&xdmar ,FRAME_BUFFER_ADDRESS+ALL_DISP_ADDRESS);
XDmar4resize_gray_Start(&xdmar);
XDmar4resize_gray_EnableAutoRestart(&xdmar);
XResize_gray_Start(&resg);
XResize_gray_EnableAutoRestart(&resg);
XCurve_conv_nn2_axis3_Start(&stcnn);
XCurve_conv_nn2_axis3_EnableAutoRestart(&stcnn);
while(1){
sleep(1);
while(!XCurve_conv_nn2_axis3_Get_outs_V_vld(&stcnn)) ;
printf("out = %d\n", (int)XCurve_conv_nn2_axis3_Get_outs_V(&stcnn));
for(i=0; i<2; i++){
XCurve_conv_nn2_axis3_Read_dot2_V_Words(&stcnn, i, &res, 1);
result[i*2] = res & 0xffff;
if(result[i*2] & 0x8000) // minus
result[i*2] = 0xffff0000 | result[i*2]; // Sign extension
result[i*2+1] = (res & 0xffff0000) >> 16;
if(result[i*2+1] & 0x8000) // minus
result[i*2+1] = 0xffff0000 | result[i*2+1]; // Sign extension
}
for(i=0; i<3; i++)
printf("result[%d] = %x ", i , result[i]);
printf("\n");
}
return(0);
}
Xilinx Zynq MP First Stage Boot Loader
Release 2017.2 Dec 24 2017 - 11:06:15
NOTICE: ATF running on XCZU3EG/silicon v4/RTL5.1 at 0xfffea000, with PMU firmware
NOTICE: BL31: Secure code at 0x0
NOTICE: BL31: Non secure code at 0x8000000
NOTICE: BL31: v1.4(release):development build
NOTICE: BL31: Built : 11:44:32, Dec 24 2017
PMUFW: v0.3
U-Boot 2017.01 (Dec 25 2017 - 00:11:15 +0900) Xilinx ZynqMP UltraZed-EG-IOCC
I2C: ready
DRAM: 2 GiB
EL Level: EL2
Chip ID: xczu3eg
MMC: sdhci@ff160000: 0 (eMMC), sdhci@ff170000: 1 (SD)
reading uboot.env
** Unable to read "uboot.env" from mmc0:1 **
Using default environment
In: serial@ff000000
Out: serial@ff000000
Err: serial@ff000000
Bootmode: SD_MODE1
Net: ZYNQ GEM: ff0e0000, phyaddr 9, interface rgmii-id
Warning: ethernet@ff0e0000 (eth0) using random MAC address - 9a:5e:bc:78:ef:9c
eth0: ethernet@ff0e0000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
Device: sdhci@ff170000
Manufacturer ID: 74
OEM: 4a60
Name: USDU1
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.3 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading uEnv.txt
461 bytes read in 11 ms (40 KiB/s)
Loaded environment from uEnv.txt
Importing environment from SD ...
Running uenvcmd ...
reading image-4.9.0-xlnx-v2017.3-fpga
13042176 bytes read in 880 ms (14.1 MiB/s)
reading devicetree-4.9.0-xlnx-v2017.3-fpga-zynqmp-uz3eg-iocc.dtb
34934 bytes read in 20 ms (1.7 MiB/s)
## Flattened Device Tree blob at 04000000
Booting using the fdt blob at 0x4000000
Loading Device Tree to 000000000fff4000, end 000000000ffff875 ... OK
Starting kernel ...
[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.0-xlnx-v2017.3-zynqmp-fpga (ichiro@sphinx-vm-ubuntu) (gcc version 5.4.0 20160609 (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.4) ) #1 SMP Thu Dec 21 13:06:41 JST 2017
[ 0.000000] Boot CPU: AArch64 Processor [410fd034]
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 256 MiB at 0x0000000070000000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] percpu: Embedded 21 pages/cpu @ffffffc06ff74000 s47384 r8192 d30440 u86016
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: enabling workaround for ARM erratum 845719
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 517120
[ 0.000000] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk1p2 rw rootwait uio_pdrv_genirq.of_id=generic-uio
[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
[ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
[ 0.000000] Memory: 1789496K/2097152K available (8892K kernel code, 576K rwdata, 2732K rodata, 512K init, 389K bss, 45512K reserved, 262144K cma-reserved)
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB)
[ 0.000000] vmalloc : 0xffffff8008000000 - 0xffffffbebfff0000 ( 250 GB)
[ 0.000000] .text : 0xffffff8008080000 - 0xffffff8008930000 ( 8896 KB)
[ 0.000000] .rodata : 0xffffff8008930000 - 0xffffff8008be0000 ( 2752 KB)
[ 0.000000] .init : 0xffffff8008be0000 - 0xffffff8008c60000 ( 512 KB)
[ 0.000000] .data : 0xffffff8008c60000 - 0xffffff8008cf0200 ( 577 KB)
[ 0.000000] .bss : 0xffffff8008cf0200 - 0xffffff8008d5163c ( 390 KB)
[ 0.000000] fixed : 0xffffffbefe7fd000 - 0xffffffbefec00000 ( 4108 KB)
[ 0.000000] PCI I/O : 0xffffffbefee00000 - 0xffffffbeffe00000 ( 16 MB)
[ 0.000000] vmemmap : 0xffffffbf00000000 - 0xffffffc000000000 ( 4 GB maximum)
[ 0.000000] 0xffffffbf00000000 - 0xffffffbf01c00000 ( 28 MB actual)
[ 0.000000] memory : 0xffffffc000000000 - 0xffffffc080000000 ( 2048 MB)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] Build-time adjustment of leaf fanout to 64.
[ 0.000000] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4
[ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] arm_arch_timer: Architected cp15 timer(s) running at 99.99MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171015c90f, max_idle_ns: 440795203080 ns
[ 0.000003] sched_clock: 56 bits at 99MHz, resolution 10ns, wraps every 4398046511101ns
[ 0.000287] Console: colour dummy device 80x25
[ 0.000307] Calibrating delay loop (skipped), value calculated using timer frequency.. 199.99 BogoMIPS (lpj=399996)
[ 0.000315] pid_max: default: 32768 minimum: 301
[ 0.000431] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.000437] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes)
[ 0.001093] ASID allocator initialised with 65536 entries
[ 0.001652] zynqmp_plat_init Power management API v0.3
[ 0.001736] EFI services will not be available.
[ 0.002118] Detected VIPT I-cache on CPU1
[ 0.002149] CPU1: Booted secondary processor [410fd034]
[ 0.002452] Detected VIPT I-cache on CPU2
[ 0.002472] CPU2: Booted secondary processor [410fd034]
[ 0.002761] Detected VIPT I-cache on CPU3
[ 0.002780] CPU3: Booted secondary processor [410fd034]
[ 0.002819] Brought up 4 CPUs
[ 0.002834] SMP: Total of 4 processors activated.
[ 0.002841] CPU features: detected feature: 32-bit EL0 Support
[ 0.002847] CPU: All CPU(s) started at EL2
[ 0.002862] alternatives: patching kernel code
[ 0.003642] devtmpfs: initialized
[ 0.009113] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.015329] xor: measuring software checksum speed
[ 0.052049] 8regs : 2048.000 MB/sec
[ 0.092080] 8regs_prefetch: 1882.000 MB/sec
[ 0.132112] 32regs : 2500.000 MB/sec
[ 0.172145] 32regs_prefetch: 2182.000 MB/sec
[ 0.172149] xor: using function: 32regs (2500.000 MB/sec)
[ 0.172249] pinctrl core: initialized pinctrl subsystem
[ 0.172979] NET: Registered protocol family 16
[ 0.190620] cpuidle: using governor menu
[ 0.190848] Failed to initialise IOMMU /amba/smmu@fd800000
[ 0.191041] vdso: 2 pages (1 code @ ffffff8008937000, 1 data @ ffffff8008c64000)
[ 0.191053] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.191658] DMA: preallocated 256 KiB pool for atomic allocations
[ 0.206145] reset_zynqmp reset-controller: Xilinx zynqmp reset driver probed
[ 0.206799] ARM CCI_400_r1 PMU driver probed
[ 0.210336] zynqmp-pinctrl ff180000.pinctrl: zynqmp pinctrl initialized
[ 0.238939] HugeTLB registered 2 MB page size, pre-allocated 0 pages
[ 0.304416] raid6: int64x1 gen() 374 MB/s
[ 0.372346] raid6: int64x1 xor() 399 MB/s
[ 0.440410] raid6: int64x2 gen() 613 MB/s
[ 0.508452] raid6: int64x2 xor() 548 MB/s
[ 0.576501] raid6: int64x4 gen() 950 MB/s
[ 0.644540] raid6: int64x4 xor() 689 MB/s
[ 0.712598] raid6: int64x8 gen() 1007 MB/s
[ 0.780633] raid6: int64x8 xor() 666 MB/s
[ 0.848700] raid6: neonx1 gen() 662 MB/s
[ 0.916766] raid6: neonx1 xor() 695 MB/s
[ 0.984811] raid6: neonx2 gen() 1069 MB/s
[ 1.052857] raid6: neonx2 xor() 949 MB/s
[ 1.120907] raid6: neonx4 gen() 1382 MB/s
[ 1.188942] raid6: neonx4 xor() 1083 MB/s
[ 1.256982] raid6: neonx8 gen() 1443 MB/s
[ 1.325034] raid6: neonx8 xor() 1103 MB/s
[ 1.325038] raid6: using algorithm neonx8 gen() 1443 MB/s
[ 1.325042] raid6: .... xor() 1103 MB/s, rmw enabled
[ 1.325046] raid6: using intx1 recovery algorithm
[ 1.325882] SCSI subsystem initialized
[ 1.326101] usbcore: registered new interface driver usbfs
[ 1.326142] usbcore: registered new interface driver hub
[ 1.326187] usbcore: registered new device driver usb
[ 1.326265] media: Linux media interface: v0.10
[ 1.326297] Linux video capture interface: v2.00
[ 1.326327] pps_core: LinuxPPS API ver. 1 registered
[ 1.326331] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 1.326348] PTP clock support registered
[ 1.326381] EDAC MC: Ver: 3.0.0
[ 1.326708] FPGA manager framework
[ 1.326858] fpga-region fpga-full: FPGA Region probed
[ 1.326958] Advanced Linux Sound Architecture Driver Initialized.
[ 1.327304] Bluetooth: Core ver 2.22
[ 1.327331] NET: Registered protocol family 31
[ 1.327335] Bluetooth: HCI device and connection manager initialized
[ 1.327345] Bluetooth: HCI socket layer initialized
[ 1.327352] Bluetooth: L2CAP socket layer initialized
[ 1.327375] Bluetooth: SCO socket layer initialized
[ 1.328020] clocksource: Switched to clocksource arch_sys_counter
[ 1.328102] VFS: Disk quotas dquot_6.6.0
[ 1.328150] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 1.333325] NET: Registered protocol family 2
[ 1.333729] TCP established hash table entries: 16384 (order: 5, 131072 bytes)
[ 1.333847] TCP bind hash table entries: 16384 (order: 6, 262144 bytes)
[ 1.334137] TCP: Hash tables configured (established 16384 bind 16384)
[ 1.334209] UDP hash table entries: 1024 (order: 3, 32768 bytes)
[ 1.334254] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)
[ 1.334406] NET: Registered protocol family 1
[ 1.334641] RPC: Registered named UNIX socket transport module.
[ 1.334646] RPC: Registered udp transport module.
[ 1.334649] RPC: Registered tcp transport module.
[ 1.334653] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 1.335102] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
[ 1.335862] futex hash table entries: 1024 (order: 5, 131072 bytes)
[ 1.335945] audit: initializing netlink subsys (disabled)
[ 1.335972] audit: type=2000 audit(1.324:1): initialized
[ 1.336515] workingset: timestamp_bits=62 max_order=19 bucket_order=0
[ 1.337189] NFS: Registering the id_resolver key type
[ 1.337207] Key type id_resolver registered
[ 1.337211] Key type id_legacy registered
[ 1.337220] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 1.337241] jffs2: version 2.2. (NAND) (SUMMARY) c 2001-2006 Red Hat, Inc.
[ 1.342073] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
[ 1.342080] io scheduler noop registered
[ 1.342085] io scheduler deadline registered
[ 1.342095] io scheduler cfq registered (default)
[ 1.343355] xilinx-dpdma fd4c0000.dma: Xilinx DPDMA engine is probed
[ 1.343741] Write failed gate address:1000f02
[ 1.343846] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
[ 1.343980] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
[ 1.344135] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
[ 1.344269] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
[ 1.344405] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
[ 1.344540] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
[ 1.344679] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
[ 1.344815] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
[ 1.345086] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
[ 1.345224] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
[ 1.345363] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
[ 1.345498] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
[ 1.345638] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
[ 1.345777] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
[ 1.345921] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
[ 1.346058] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
[ 1.346232] zynqmp_pm firmware: Power management API v0.3
[ 1.378801] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 1.380299] ff000000.serial: ttyPS0 at MMIO 0xff000000 (irq = 40, base_baud = 6249999) is a xuartps
[ 2.344446] console [ttyPS0] enabled
[ 2.348408] ff010000.serial: ttyPS1 at MMIO 0xff010000 (irq = 41, base_baud = 6249999) is a xuartps
[ 2.357593] [drm] Initialized
[ 2.360846] [drm] load() is defered & will be called again
[ 2.366757] xilinx-drm-dp-sub fd4aa000.dp_sub: Xilinx DisplayPort Subsystem is probed
[ 2.374677] Unable to detect cache hierarchy from DT for CPU 0
[ 2.385879] brd: module loaded
[ 2.392174] loop: module loaded
[ 2.396117] ahci-ceva fd0c0000.ahci: ceva,p1-cominit-params property not defined
[ 2.403459] ahci-ceva: probe of fd0c0000.ahci failed with error -22
[ 2.409810] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 2.417060] m25p80 spi0.0: found n25q256a, expected n25q512a
[ 2.422760] m25p80 spi0.0: n25q256a (65536 Kbytes)
[ 2.427481] 3 ofpart partitions found on MTD device spi0.0
[ 2.432934] Creating 3 MTD partitions on "spi0.0":
[ 2.437710] 0x000000000000-0x000000100000 : "boot"
[ 2.443043] 0x000000100000-0x000000140000 : "bootenv"
[ 2.448532] 0x000000140000-0x000001740000 : "kernel"
[ 2.454850] libphy: Fixed MDIO Bus: probed
[ 2.460085] tun: Universal TUN/TAP device driver, 1.6
[ 2.465055] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
[ 2.471360] CAN device driver interface
[ 2.475757] macb ff0e0000.ethernet: Not enabling partial store and forward
[ 2.483104] libphy: MACB_mii_bus: probed
[ 2.488789] macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 30 (9a:5e:bc:78:ef:9c)
[ 2.498530] TI DP83867 ff0e0000.etherne:09: attached PHY driver [TI DP83867] (mii_bus:phy_addr=ff0e0000.etherne:09, irq=-1)
[ 2.510135] usbcore: registered new interface driver asix
[ 2.515491] usbcore: registered new interface driver ax88179_178a
[ 2.521549] usbcore: registered new interface driver cdc_ether
[ 2.527362] usbcore: registered new interface driver net1080
[ 2.533003] usbcore: registered new interface driver cdc_subset
[ 2.538906] usbcore: registered new interface driver zaurus
[ 2.544473] usbcore: registered new interface driver cdc_ncm
[ 2.550693] usbcore: registered new interface driver uas
[ 2.555960] usbcore: registered new interface driver usb-storage
[ 2.562234] mousedev: PS/2 mouse device common for all mice
[ 2.568170] rtc_zynqmp ffa60000.rtc: rtc core: registered ffa60000.rtc as rtc0
[ 2.575343] i2c /dev entries driver
[ 2.579070] cdns-i2c ff030000.i2c: 400 kHz mmio ff030000 irq 32
[ 2.585917] usbcore: registered new interface driver uvcvideo
[ 2.591578] USB Video Class driver (1.1.1)
[ 2.596212] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer at ffffff8008ed9000 with timeout 10s
[ 2.605306] Bluetooth: HCI UART driver ver 2.3
[ 2.609671] Bluetooth: HCI UART protocol H4 registered
[ 2.614795] Bluetooth: HCI UART protocol BCSP registered
[ 2.620081] Bluetooth: HCI UART protocol LL registered
[ 2.625201] Bluetooth: HCI UART protocol ATH3K registered
[ 2.630583] Bluetooth: HCI UART protocol Three-wire (H5) registered
[ 2.636876] Bluetooth: HCI UART protocol Intel registered
[ 2.642252] Bluetooth: HCI UART protocol Broadcom registered
[ 2.647857] Bluetooth: HCI UART protocol QCA registered
[ 2.653102] usbcore: registered new interface driver bcm203x
[ 2.658741] usbcore: registered new interface driver bpa10x
[ 2.664296] usbcore: registered new interface driver bfusb
[ 2.669767] usbcore: registered new interface driver btusb
[ 2.675200] Bluetooth: Generic Bluetooth SDIO driver ver 0.1
[ 2.680895] usbcore: registered new interface driver ath3k
[ 2.686436] EDAC MC: ECC not enabled
[ 2.690090] EDAC DEVICE0: Giving out device to module zynqmp-ocm-edac controller zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
[ 2.702697] cpufreq: cpufreq_online: CPU0: Running at unlisted freq: 1099999 KHz
[ 2.710100] cpufreq: cpufreq_online: CPU0: Unlisted initial frequency changed to: 1199999 KHz
[ 2.718960] sdhci: Secure Digital Host Controller Interface driver
[ 2.725050] sdhci: Copyright(c) Pierre Ossman
[ 2.729388] sdhci-pltfm: SDHCI platform and OF driver helper
[ 2.735564] ledtrig-cpu: registered to indicate activity on CPUs
[ 2.741619] usbcore: registered new interface driver usbhid
[ 2.747110] usbhid: USB HID core driver
[ 2.752738] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[ 2.759786] pktgen: Packet Generator for packet performance testing. Version: 2.75
[ 2.767483] Netfilter messages via NETLINK v0.30.
[ 2.772234] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 2.777511] Initializing XFRM netlink socket
[ 2.781768] NET: Registered protocol family 10
[ 2.786635] ip6_tables: (C) 2000-2006 Netfilter Core Team
[ 2.791993] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 2.798243] NET: Registered protocol family 17
[ 2.802609] NET: Registered protocol family 15
[ 2.807037] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[ 2.819959] Ebtables v2.0 registered
[ 2.823567] can: controller area network core (rev 20120528 abi 9)
[ 2.829716] NET: Registered protocol family 29
[ 2.834109] can: raw protocol (rev 20120528)
[ 2.838359] can: broadcast manager protocol (rev 20161123 t)
[ 2.844004] can: netlink gateway (rev 20130117) max_hops=1
[ 2.849544] Bluetooth: RFCOMM TTY layer initialized
[ 2.854350] Bluetooth: RFCOMM socket layer initialized
[ 2.859470] Bluetooth: RFCOMM ver 1.11
[ 2.863197] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
[ 2.868491] Bluetooth: BNEP filters: protocol multicast
[ 2.873700] Bluetooth: BNEP socket layer initialized
[ 2.878644] Bluetooth: HIDP (Human Interface Emulation) ver 1.2
[ 2.884549] Bluetooth: HIDP socket layer initialized
[ 2.889652] 9pnet: Installing 9P2000 support
[ 2.893848] Key type dns_resolver registered
[ 2.898539] registered taskstats version 1
[ 2.902987] Btrfs loaded, crc32c=crc32c-generic
[ 2.918499] [drm] load() is defered & will be called again
[ 2.924699] xilinx-psgtr fd400000.zynqmp_phy: Lane:3 type:8 protocol:4 pll_locked:yes
[ 2.932734] xilinx-drm-dp fd4a0000.dp: device found, version 4.010
[ 2.938839] xilinx-drm-dp fd4a0000.dp: Display Port, version 1.0200 (tx)
[ 2.946521] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 2.951939] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1
[ 2.959810] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100 quirks 0x02010010
[ 2.968448] xhci-hcd xhci-hcd.0.auto: irq 220, io mem 0xfe200000
[ 2.974542] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 2.981248] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 2.988449] usb usb1: Product: xHCI Host Controller
[ 2.993308] usb usb1: Manufacturer: Linux 4.9.0-xlnx-v2017.3-zynqmp-fpga xhci-hcd
[ 3.000773] usb usb1: SerialNumber: xhci-hcd.0.auto
[ 3.005958] hub 1-0:1.0: USB hub found
[ 3.009642] hub 1-0:1.0: 1 port detected
[ 3.013703] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 3.019114] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2
[ 3.026797] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[ 3.034895] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
[ 3.041599] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 3.048801] usb usb2: Product: xHCI Host Controller
[ 3.053661] usb usb2: Manufacturer: Linux 4.9.0-xlnx-v2017.3-zynqmp-fpga xhci-hcd
[ 3.061126] usb usb2: SerialNumber: xhci-hcd.0.auto
[ 3.066274] hub 2-0:1.0: USB hub found
[ 3.069957] hub 2-0:1.0: 1 port detected
[ 3.120025] mmc0: SDHCI controller on ff160000.sdhci [ff160000.sdhci] using ADMA 64-bit
[ 3.176026] mmc1: SDHCI controller on ff170000.sdhci [ff170000.sdhci] using ADMA 64-bit
[ 3.184642] OF: graph: no port node found in /xilinx_drm
[ 3.189876] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 3.196467] [drm] No driver support for vblank timestamp query.
[ 3.243768] mmc0: new HS200 MMC card at address 0001
[ 3.248926] mmcblk0: mmc0:0001 Q2J55L 7.09 GiB
[ 3.253492] mmcblk0boot0: mmc0:0001 Q2J55L partition 1 16.0 MiB
[ 3.259446] mmcblk0boot1: mmc0:0001 Q2J55L partition 2 16.0 MiB
[ 3.265390] mmcblk0rpmb: mmc0:0001 Q2J55L partition 3 4.00 MiB
[ 3.271930] mmcblk0: p1
[ 3.285962] mmc1: new high speed SDHC card at address 59b4
[ 3.291577] mmcblk1: mmc1:59b4 USDU1 7.31 GiB
[ 3.296619] mmcblk1: p1 p2
[ 3.339460] random: fast init done
[ 7.324783] xilinx-drm xilinx_drm: No connectors reported connected with modes
[ 7.331928] [drm] Cannot find any crtc or sizes - going 1024x768
[ 7.344608] Console: switching to colour frame buffer device 128x48
[ 7.355861] xilinx-drm xilinx_drm: fb0: frame buffer device
[ 7.380030] [drm] Initialized xilinx_drm 1.0.0 20130509 on minor 0
[ 7.386366] rtc_zynqmp ffa60000.rtc: setting system clock to 2016-11-03 17:20:55 UTC (1478193655)
[ 7.395160] of_cfs_init
[ 7.397604] of_cfs_init: OK
[ 7.401677] ALSA device list:
[ 7.404554] No soundcards found.
[ 7.409324] EXT4-fs (mmcblk1p2): mounting ext3 file system using the ext4 subsystem
[ 7.429639] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[ 7.437663] VFS: Mounted root (ext3 filesystem) on device 179:34.
[ 7.447709] devtmpfs: mounted
[ 7.450810] Freeing unused kernel memory: 512K (ffffffc000be0000 - ffffffc000c60000)
[ 7.922171] systemd[1]: systemd 232 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN)
[ 7.940358] systemd[1]: Detected architecture arm64.
Welcome to Debian GNU/Linux 9 (stretch)!
[ 7.956544] systemd[1]: Set hostname to <debian-fpga>.
[ 8.248911] systemd[1]: Reached target Swap.
[ OK ] Reached target Swap.
[ 8.264225] systemd[1]: Listening on udev Kernel Socket.
[ OK ] Listening on udev Kernel Socket.
[ 8.280172] systemd[1]: Listening on Journal Socket (/dev/log).
[ OK ] Listening on Journal Socket (/dev/log).
[ 8.296139] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
[ OK ] Listening on /dev/initctl Compatibility Named Pipe.
[ 8.320166] systemd[1]: Listening on udev Control Socket.
[ OK ] Listening on udev Control Socket.
[ 8.336086] systemd[1]: Reached target Remote File Systems.
[ OK ] Reached target Remote File Systems.
[ 8.352264] systemd[1]: Created slice System Slice.
[ OK ] Created slice System Slice.
Mounting POSIX Message Queue File System...
[ OK ] Started Dispatch Password Requests to Console Directory Watch.
[ OK ] Listening on Journal Socket.
Starting Nameserver information manager...
Starting Remount Root and Kernel File Systems...
Mounting Debug File System...
[ OK ] Created slice system-getty.slice.
[ OK ] Started Forward Password Requests to Wall Directory Watch.
[ OK ] Reached target Encrypted Volumes.
[ OK ] Reached target Paths.
Starting Create Static Device Nodes in /dev...
[ OK ] Created slice User and Session Slice.
[ OK ] Reached target Slices.
[ OK ] Listening on Journal Audit Socket.
Starting Load Kernel Modules...
[ OK ] Listening on Syslog Socket.
Starting Journal Service...
[ OK ] Created slice system-serial\x2dgetty.slice.
[ OK ] Mounted Debug File System.
[ OK ] Mounted POSIX Message Queue File System.
[ OK ] Started Remount Root and Kernel File Systems.
[ OK ] Started Create Static Device Nodes in /dev.
[ OK ] Started Load Kernel Modules.
[ OK ] Started Nameserver information manager.
[ OK ] Started Journal Service.
Starting Apply Kernel Variables...
Mounting Configuration File System...
Starting udev Kernel Device Manager...
Starting Load/Save Random Seed...
Starting Flush Journal to Persistent Storage...
[ OK ] Reached target Local File Systems (Pre).
Mounting /config...
Starting udev Coldplug all Devices...
[ OK ] Mounted Configuration File System.
[ OK ] Mounted /config.
[ OK ] Started Apply Kernel Variables.
[ OK ] Started Load/Save Random Seed.
[ 8.889501] systemd-journald[1607]: Received request to flush runtime journal from PID 1
[ OK ] Started Flush Journal to Persistent Storage.
[ OK ] Started udev Kernel Device Manager.
[ OK ] Found device /dev/ttyPS0.
[ OK ] Started udev Coldplug all Devices.
[ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch.
[ 9.341732] random: crng init done
[ OK ] Found device /dev/mmcblk0p1.
Mounting /boot...
[ 9.740992] FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
[ OK ] Mounted /boot.
[ OK ] Reached target Local File Systems.
Starting Create Volatile Files and Directories...
[ OK ] Started ifup for eth0.
Starting Raise network interfaces...
[ OK ] Started Create Volatile Files and Directories.
[ OK ] Reached target System Time Synchronized.
Starting Update UTMP about System Boot/Shutdown...
[ OK ] Started Update UTMP about System Boot/Shutdown.
[ OK ] Reached target System Initialization.
[ OK ] Started Daily Cleanup of Temporary Directories.
[ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket.
[ OK ] Started Daily apt download activities.
[ OK ] Started Daily apt upgrade and clean activities.
[ OK ] Reached target Timers.
[ OK ] Listening on D-Bus System Message Bus Socket.
[ OK ] Reached target Sockets.
[ OK ] Reached target Basic System.
Starting System Logging Service...
Starting Login Service...
[ OK ] Started Regular background program processing daemon.
[ OK ] Started D-Bus System Message Bus.
[ 10.131541] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
Starting Avahi mDNS/DNS-SD Stack...
[ OK ] Started System Logging Service.
[ OK ] Started Login Service.
[ OK ] Started Avahi mDNS/DNS-SD Stack.
[ OK ] Started Raise network interfaces.
[ OK ] Reached target Network.
Starting OpenBSD Secure Shell server...
Starting Permit User Sessions...
[ OK ] Reached target Network is Online.
Starting Samba NMB Daemon...
Starting LSB: Start NTP daemon...
[ OK ] Started Permit User Sessions.
[ OK ] Started Getty on tty1.
[ OK ] Started Serial Getty on ttyPS0.
[ OK ] Reached target Login Prompts.
[ OK ] Started OpenBSD Secure Shell server.
[ OK ] Started LSB: Start NTP daemon.
[ 11.140381] macb ff0e0000.ethernet eth0: link up (1000/Full)
[ 11.146000] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Starting Samba SMB Daemon...
[ OK ] Started Samba SMB Daemon.
Debian GNU/Linux 9 debian-fpga ttyPS0
debian-fpga login:
// curve_conv_nn2_axis3.cpp
// 2017/09/09 by marsee
// 畳み込み層のカーネル数 2
// AXI4 Stream入力 番号出力
// 2017/09/18 : dot2[3]の出力も追加
// 2017/12/13 : 直線に加えてカーブのデータも使用して学習した
//
#include <ap_fixed.h>
#include <hls_stream.h>
#include <ap_axi_sdata.h>
#include "conv1_weight.h"
#include "conv1_bias.h"
#include "af1_weight.h"
#include "af1_bias.h"
#include "af2_weight.h"
#include "af2_bias.h"
#define REDUSED_ROW 45
#define REDUSED_COULMN 60
#define NUM_OF_KERNELS 2
#define COULMN_PIXELS 56
#define ROW_PIXELS 10
#define ALL_PIXELS 560
#define NUM_OF_OUTPUT 3
int max_ap_fixed(ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT], ap_uint<2> &out_num);
int curve_conv_nn2_axis3(hls::stream<ap_axiu<32,1,1,1> >& ins, ap_uint<2> &outs,
ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> dot2[NUM_OF_OUTPUT]){
#pragma HLS INTERFACE s_axilite port=dot2
#pragma HLS INTERFACE s_axilite port=return
#pragma HLS INTERFACE s_axilite port=outs
#pragma HLS INTERFACE axis register both port=ins
ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT> buf[ROW_PIXELS][COULMN_PIXELS];
ap_fixed<13, 6, AP_TRN_ZERO, AP_SAT> conv_out[NUM_OF_KERNELS][ROW_PIXELS-4][COULMN_PIXELS-4];
ap_fixed<13, 6, AP_TRN_ZERO, AP_SAT> pool_out[NUM_OF_KERNELS][(ROW_PIXELS-4)/2][(COULMN_PIXELS-4)/2];
ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> dot1[100];
ap_axiu<32,1,1,1> pix;
do {
#pragma HLS LOOP_TRIPCOUNT min=1 max=1 avg=1
// user が 1になった時にフレームがスタートする
ins >> pix;
} while(pix.user == 0);
// 10 x 56 に整形
buf_copy1: for(int i=0; i<REDUSED_ROW; i++){
buf_copy2: for(int j=0; j<REDUSED_COULMN; j++){
if (!(i==0 && j==0)) // 最初の入力はすでに入力されている
ins >> pix; // AXI4-Stream からの入力
if((i>=33 && i<33+ROW_PIXELS) && (j>=2 && j<2+COULMN_PIXELS)){
buf[i-33][j-2] = (ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT>)((ap_ufixed<16, 8, AP_TRN_ZERO, AP_SAT>)(pix.data & 0xff) / 256);
}
}
}
// Convolutional Neural Network 5x5 kernel, Stride = 1, Padding = 0
// + ReLU
CONV1: for(int i=0; i<NUM_OF_KERNELS; i++){ // カーネルの個数
CONV2: for(int j=0; j<ROW_PIXELS-4; j++){
CONV3: for(int k=0; k<COULMN_PIXELS-4; k++){
conv_out[i][j][k] = 0;
CONV4: for(int m=0; m<5; m++){
CONV5: for(int n=0; n<5; n++){
conv_out[i][j][k] += buf[j+m][k+n] * conv1_weight[i][0][m][n];
}
}
conv_out[i][j][k] += conv1_bias[i];
if(conv_out[i][j][k]<0) // ReLU
conv_out[i][j][k] = 0;
}
}
}
// Pooling Kernel = 2 x 2, Stride = 2
POOL1: for(int i=0; i<NUM_OF_KERNELS; i++){
POOL2: for(int j=0; j<ROW_PIXELS-4; j += 2){
POOL3: for(int k=0; k<COULMN_PIXELS-4; k += 2){
POOL4: for(int m=0; m<2; m++){
POOL5: for(int n=0; n<2; n++){
if(m==0 && n==0){
pool_out[i][j/2][k/2] = conv_out[i][j][k];
} else if(pool_out[i][j/2][k/2] < conv_out[i][j+m][k+n]){
pool_out[i][j/2][k/2] = conv_out[i][j+m][k+n];
}
}
}
}
}
}
af1_dot1: for(int col=0; col<100; col++){
dot1[col] = 0;
af1_dot2: for(int i=0; i<NUM_OF_KERNELS; i++){
af1_dot3: for(int j=0; j<(ROW_PIXELS-4)/2; j++){
af1_dot4: for(int k=0; k<(COULMN_PIXELS-4)/2; k++){
dot1[col] += pool_out[i][j][k]*af1_weight[i*((ROW_PIXELS-4)/2)*((COULMN_PIXELS-4)/2)+j*((COULMN_PIXELS-4)/2)+k][col];
}
}
}
dot1[col] += af1_bias[col];
if(dot1[col] < 0) // ReLU
dot1[col] = 0;
}
af2_dot1: for(int col=0; col<NUM_OF_OUTPUT; col++){
dot2[col] = 0;
af2_dot2: for(int row=0; row<100; row++){
dot2[col] += dot1[row]*af2_weight[row][col];
}
dot2[col] += af2_bias[col];
}
max_ap_fixed(dot2, outs);
return(0);
}
int max_ap_fixed(ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT], ap_uint<2> &out_num){
int max_id;
ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> max;
for(int i=0; i<NUM_OF_OUTPUT; i++){
if(i == 0){
max = out[0];
max_id = 0;
}else if(out[i]>max){
max = out[i];
max_id = i;
}
}
out_num = (ap_uint<2>)max_id;
return(0);
}
// curve_conv_nn2_axis3_tb.cpp
// 2017/09/09 by marsee
//
// 2017/09/18 : straight_conv_nn2_axis3.cpp に dot2[3]の出力も追加
// 2017/12/13 : 直線に加えてカーブのデータも使用して学習した
//
#include <iostream>
#include "hls_opencv.h"
#include "ap_axi_sdata.h"
#include "hls_video.h"
#define MAX_HEIGHT 600
#define MAX_WIDTH 800
typedef hls::stream<ap_axiu<32,1,1,1> > AXI_STREAM;
typedef hls::Mat<MAX_HEIGHT, MAX_WIDTH, HLS_8UC3> RGB_IMAGE;
typedef hls::Mat<MAX_HEIGHT, MAX_WIDTH, HLS_8UC1> GRAY_IMAGE;
using namespace cv;
#define NUM_OF_OUTPUT 3
//#define STRAIGHT_LOOP_COUNT 41 // train_images
//#define LR_LOOP_COUNT 18 // train_images
#define STRAIGHT_LOOP_COUNT 35 // test_images
#define LR_LOOP_COUNT 12 // test_images
//#define STRAIGHT_LOOP_COUNT 1 // for C/RTL Co-Simulation
//#define LR_LOOP_COUNT 1 // for C/RTL Co-Simulation
//#define STRAIGHT_IMAGE_NAME "train_images_171129/straight"
//#define LEFT_TURN_IMAGE_NAME "train_images_171129/left_turn"
//#define RIGHT_TURN_IMAGE_NAME "train_images_171129/right_turn"
#define STRAIGHT_IMAGE_NAME "test_images_171129/straight_test"
#define LEFT_TURN_IMAGE_NAME "test_images_171129/left_turn_test"
#define RIGHT_TURN_IMAGE_NAME "test_images_171129/right_turn_test"
int curve_conv_nn2_axis3(hls::stream<ap_axiu<32,1,1,1> >& ins, ap_uint<2> &outs,
ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> dot2[NUM_OF_OUTPUT]);
int resize_gray(AXI_STREAM& ins, AXI_STREAM& outs);
int main_output_loop(char *buf, int loop_count, int correct_data);
int main () {
char buf[200];
sprintf(buf, "%s", STRAIGHT_IMAGE_NAME);
main_output_loop(buf, STRAIGHT_LOOP_COUNT, 1);
sprintf(buf, "%s", LEFT_TURN_IMAGE_NAME);
main_output_loop(buf, LR_LOOP_COUNT, 0);
sprintf(buf, "%s", RIGHT_TURN_IMAGE_NAME);
main_output_loop(buf, LR_LOOP_COUNT, 2);
return(0);
}
int main_output_loop(char *buf, int loop_count, int correct_data){
char bmp_file_name[200];
ap_uint<2> outs;
AXI_STREAM src_axi, dst_axi;
Mat src;
ap_fixed<16, 7, AP_TRN_ZERO, AP_SAT> dot2[NUM_OF_OUTPUT];
int err_num = 0;
for(int i=0; i<loop_count; i++){
sprintf(bmp_file_name, "%s%d.bmp", buf, i);
// OpenCV で 画像を読み込む
src = imread(bmp_file_name);
// BGR から RGBへ変換
Mat src_rgb;
cvtColor(src, src_rgb, CV_BGR2RGB);
// Mat フォーマットから AXI4 Stream へ変換
cvMat2AXIvideo(src_rgb, src_axi);
// resize_gray() 関数をコール
resize_gray(src_axi, dst_axi);
curve_conv_nn2_axis3(dst_axi, outs, dot2);
if((int)outs != correct_data){
printf("*%s\n", bmp_file_name);
printf("correct data = %d, outs = %d\n", correct_data, (int)outs);
for(int i=0; i<NUM_OF_OUTPUT; i++)
printf("dot2[%d] = %f ", i, (float)dot2[i]);
printf("\n");
err_num++;
}
}
if(correct_data == 1)
printf("Straight error is %d\n\n", err_num);
else if(correct_data == 0)
printf("Left error is %d\n\n", err_num);
else // if(correct_data == 2)
printf("Right error is %d\n\n", err_num);
return(0);
}
int resize_gray(AXI_STREAM& ins, AXI_STREAM& outs){
RGB_IMAGE org_img(600, 800);
GRAY_IMAGE org_img_g(600, 800);
GRAY_IMAGE resize_img_g(45, 60);
RGB_IMAGE resize_img(45, 60);
hls::AXIvideo2Mat(ins, org_img);
hls::CvtColor<HLS_RGB2GRAY>(org_img, org_img_g);
hls::Resize(org_img_g, resize_img_g);
hls::CvtColor<HLS_GRAY2RGB>(resize_img_g, resize_img);
hls::Mat2AXIvideo(resize_img, outs);
return(0);
}
INFO: [SIM 2] *************** CSIM start ***************
INFO: [SIM 4] CSIM will launch GCC as the compiler.
Compiling ../../../curve_conv_nn2_axis3_tb.cpp in debug mode
Generating csim.exe
Straight error is 0
*test_images_171129/left_turn_test8.bmp
correct data = 0, outs = 1
dot2[0] = -0.435547 dot2[1] = 1.232422 dot2[2] = -4.697266
Left error is 1
Right error is 0
INFO: [SIM 1] CSim done with 0 errors.
INFO: [SIM 3] *************** CSIM finish ***************
hw_err_cnt = 8, sw_err_cnt = 10
hw accuracy = 97.333336%, sw accuracy = 96.666664%
hw_err_cnt = 7, sw_err_cnt = 20
hw accuracy = 97.666669%, sw accuracy = 93.333334%
hw_err_cnt = 26, sw_err_cnt = 34
hw accuracy = 91.333336%, sw accuracy = 88.666666%
hw_err_cnt = 11, sw_err_cnt = 9
hw accuracy = 96.333331%, sw accuracy = 97.000003%
hw_err_cnt = 25, sw_err_cnt = 25
hw accuracy = 91.666669%, sw accuracy = 91.666669%
hw_err_cnt = 14, sw_err_cnt = 6
hw accuracy = 95.333332%, sw accuracy = 98.000002%
// curve_conv_nn2.cpp
// 2017/12/06 by marsee
// 畳み込み層のカーネル数 2
//
#include <ap_fixed.h>
#include "conv1_weight.h"
#include "conv1_bias.h"
#include "af1_weight.h"
#include "af1_bias.h"
#include "af2_weight.h"
#include "af2_bias.h"
#define NUM_OF_KERNELS 2
#define COULMN_PIXELS 56
#define ROW_PIXELS 10
#define ALL_PIXELS 560
#define NUM_OF_OUTPUT 3
int curve_conv_nn(ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT> in[ALL_PIXELS], ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT]){
ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT> buf[ROW_PIXELS][COULMN_PIXELS];
ap_fixed<16, 6, AP_TRN_ZERO, AP_SAT> conv_out[NUM_OF_KERNELS][ROW_PIXELS-4][COULMN_PIXELS-4];
ap_fixed<16, 6, AP_TRN_ZERO, AP_SAT> pool_out[NUM_OF_KERNELS][(ROW_PIXELS-4)/2][(COULMN_PIXELS-4)/2];
ap_fixed<19, 7, AP_TRN_ZERO, AP_SAT> dot1[100];
ap_fixed<19, 7, AP_TRN_ZERO, AP_SAT> dot2[NUM_OF_OUTPUT];
buf_copy1: for(int i=0; i<ROW_PIXELS; i++)
buf_copy2: for(int j=0; j<COULMN_PIXELS; j++)
buf[i][j] = in[i*COULMN_PIXELS+j];
// Convolutional Neural Network 5x5 kernel, Stride = 1, Padding = 0
// + ReLU
CONV1: for(int i=0; i<NUM_OF_KERNELS; i++){ // カーネルの個数
CONV2: for(int j=0; j<ROW_PIXELS-4; j++){
CONV3: for(int k=0; k<COULMN_PIXELS-4; k++){
conv_out[i][j][k] = 0;
CONV4: for(int m=0; m<5; m++){
CONV5: for(int n=0; n<5; n++){
conv_out[i][j][k] += buf[j+m][k+n] * conv1_weight[i][0][m][n];
}
}
conv_out[i][j][k] += conv1_bias[i];
if(conv_out[i][j][k]<0) // ReLU
conv_out[i][j][k] = 0;
}
}
}
// Pooling Kernel = 2 x 2, Stride = 2
POOL1: for(int i=0; i<NUM_OF_KERNELS; i++){
POOL2: for(int j=0; j<ROW_PIXELS-4; j += 2){
POOL3: for(int k=0; k<COULMN_PIXELS-4; k += 2){
POOL4: for(int m=0; m<2; m++){
POOL5: for(int n=0; n<2; n++){
if(m==0 && n==0){
pool_out[i][j/2][k/2] = conv_out[i][j][k];
} else if(pool_out[i][j/2][k/2] < conv_out[i][j+m][k+n]){
pool_out[i][j/2][k/2] = conv_out[i][j+m][k+n];
}
}
}
}
}
}
af1_dot1: for(int col=0; col<100; col++){
dot1[col] = 0;
af1_dot2: for(int i=0; i<NUM_OF_KERNELS; i++){
af1_dot3: for(int j=0; j<(ROW_PIXELS-4)/2; j++){
af1_dot4: for(int k=0; k<(COULMN_PIXELS-4)/2; k++){
dot1[col] += pool_out[i][j][k]*af1_weight[i*((ROW_PIXELS-4)/2)*((COULMN_PIXELS-4)/2)+j*((COULMN_PIXELS-4)/2)+k][col];
}
}
}
dot1[col] += af1_bias[col];
if(dot1[col] < 0) // ReLU
dot1[col] = 0;
}
af2_dot1: for(int col=0; col<NUM_OF_OUTPUT; col++){
dot2[col] = 0;
af2_dot2: for(int row=0; row<100; row++){
dot2[col] += dot1[row]*af2_weight[row][col];
}
dot2[col] += af2_bias[col];
out[col] = dot2[col];
}
return(0);
}
// curve_conv_nn_tb.cpp
// 2017/12/06 by marsee
// 畳み込み層のカーネル数 2
//
#include <stdio.h>
#include <ap_fixed.h>
#include "conv1_weight.h"
#include "conv1_bias.h"
#include "af1_weight.h"
#include "af1_bias.h"
#include "af2_weight.h"
#include "af2_bias.h"
#include "curve_data_0_100.h"
//#include "curve_data_2500_2600.h"
//#include "curve_data_5000_5100.h"
#define ALL_DATA_NUM 300
#define NUM_OF_KERNELS 2
#define COULMN_PIXELS 56
#define ROW_PIXELS 10
#define ALL_PIXELS 560
#define NUM_OF_OUTPUT 3
int curve_conv_nn(ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT> in[ALL_PIXELS], ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT]);
int curve_conv_nn_float(float in[ALL_PIXELS], float out[NUM_OF_OUTPUT]);
int max_ap_fixed(ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT]);
int max_float(float out[NUM_OF_OUTPUT]);
#define NUM_ITERATIONS 300 // C Simulation
//#define NUM_ITERATIONS 1 // C/RTL CoSimulation
int main(){
float t_tran_float[NUM_ITERATIONS][ALL_PIXELS];
ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> result_ap_fixed[NUM_ITERATIONS][NUM_OF_OUTPUT];
float result_float[NUM_ITERATIONS][NUM_OF_OUTPUT];
int max_id_hw, max_id_sw, max_id_ref;
for(int i=0; i<NUM_ITERATIONS; i++)
for(int j=0; j<ALL_PIXELS; j++)
t_tran_float[i][j] = (float)t_train[i][j];
for(int i=0; i<NUM_ITERATIONS; i++){
curve_conv_nn(&t_train[i][0], &result_ap_fixed[i][0]);
curve_conv_nn_float(&t_tran_float[i][0], &result_float[i][0]);
}
int errflag=0;
int sw_err_cnt = 0;
int hw_err_cnt = 0;
for(int i=0; i<NUM_ITERATIONS; i++){
max_id_hw = max_ap_fixed(&result_ap_fixed[i][0]);
max_id_sw = max_float(&result_float[i][0]);
max_id_ref = max_float(&t_test[i][0]);
if(max_id_ref != max_id_hw){
printf("id = %d, max_id_ref = %d, max_id_hw = %d\n", i, max_id_ref, max_id_hw);
errflag = 1;
hw_err_cnt++;
}
if(max_id_ref != max_id_sw){
printf("id = %d, max_id_ref = %d, max_id_sw = %d\n", i, max_id_ref, max_id_sw);
errflag = 1;
sw_err_cnt++;
}
}
if(errflag == 0){
printf("No Error\n");
} else {
printf("\nhw_err_cnt = %d, sw_err_cnt = %d\n", hw_err_cnt, sw_err_cnt);
printf("hw accuracy = %f\%, sw accuracy = %f\%\n",
(((float)ALL_DATA_NUM-(float)hw_err_cnt)/(float)ALL_DATA_NUM)*100.0,
(((float)ALL_DATA_NUM-(float)sw_err_cnt)/(float)ALL_DATA_NUM)*100.0);
}
printf("\n");
return(0);
}
int curve_conv_nn_float(float in[ALL_PIXELS], float out[NUM_OF_OUTPUT]){
float buf[ROW_PIXELS][COULMN_PIXELS];
float conv_out[NUM_OF_KERNELS][ROW_PIXELS-4][COULMN_PIXELS-4];
float pool_out[NUM_OF_KERNELS][(ROW_PIXELS-4)/2][(COULMN_PIXELS-4)/2];
float dot1[100];
float dot2[NUM_OF_OUTPUT];
buf_copy1: for(int i=0; i<ROW_PIXELS; i++)
buf_copy2: for(int j=0; j<COULMN_PIXELS; j++)
buf[i][j] = in[i*COULMN_PIXELS+j];
// Convolutional Neural Network 5x5 kernel, Stride = 1, Padding = 0
// + ReLU
CONV1: for(int i=0; i<NUM_OF_KERNELS; i++){ // カーネルの個数
CONV2: for(int j=0; j<ROW_PIXELS-4; j++){
CONV3: for(int k=0; k<COULMN_PIXELS-4; k++){
conv_out[i][j][k] = 0;
CONV4: for(int m=0; m<5; m++){
CONV5: for(int n=0; n<5; n++){
conv_out[i][j][k] += buf[j+m][k+n] * conv1_fweight[i][0][m][n];
}
}
conv_out[i][j][k] += conv1_fbias[i];
if(conv_out[i][j][k]<0) // ReLU
conv_out[i][j][k] = 0;
}
}
}
// Pooling Kernel = 2 x 2, Stride = 2
POOL1: for(int i=0; i<NUM_OF_KERNELS; i++){
POOL2: for(int j=0; j<ROW_PIXELS-4; j += 2){
POOL3: for(int k=0; k<COULMN_PIXELS-4; k += 2){
POOL4: for(int m=0; m<2; m++){
POOL5: for(int n=0; n<2; n++){
if(m==0 && n==0){
pool_out[i][j/2][k/2] = conv_out[i][j][k];
} else if(pool_out[i][j/2][k/2] < conv_out[i][j+m][k+n]){
pool_out[i][j/2][k/2] = conv_out[i][j+m][k+n];
}
}
}
}
}
}
af1_dot1: for(int col=0; col<100; col++){
dot1[col] = 0;
af1_dot2: for(int i=0; i<NUM_OF_KERNELS; i++){
af1_dot3: for(int j=0; j<(ROW_PIXELS-4)/2; j++){
af1_dot4: for(int k=0; k<(COULMN_PIXELS-4)/2; k++){
dot1[col] += pool_out[i][j][k]*af1_fweight[i*((ROW_PIXELS-4)/2)*((COULMN_PIXELS-4)/2)+j*((COULMN_PIXELS-4)/2)+k][col];
}
}
}
dot1[col] += af1_fbias[col];
if(dot1[col] < 0) // ReLU
dot1[col] = 0;
}
af2_dot1: for(int col=0; col<NUM_OF_OUTPUT; col++){
dot2[col] = 0;
af2_dot2: for(int row=0; row<100; row++){
dot2[col] += dot1[row]*af2_fweight[row][col];
}
dot2[col] += af2_fbias[col];
out[col] = dot2[col];
}
return(0);
}
int max_ap_fixed(ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> out[NUM_OF_OUTPUT]){
int max_id;
ap_fixed<12, 7, AP_TRN_ZERO, AP_SAT> max;
for(int i=0; i<NUM_OF_OUTPUT; i++){
if(i == 0){
max = out[0];
max_id = 0;
}else if(out[i]>max){
max = out[i];
max_id = i;
}
}
return(max_id);
}
int max_float(float out[NUM_OF_OUTPUT]){
int max_id;
float max;
for(int i=0; i<NUM_OF_OUTPUT; i++){
if(i == 0){
max = out[0];
max_id = 0;
}else if(out[i]>max){
max = out[i];
max_id = i;
}
}
return(max_id);
}
hw_err_cnt = 7, sw_err_cnt = 20
hw accuracy = 97.666669%, sw accuracy = 93.333334%
hw_err_cnt = 16, sw_err_cnt = 11
hw accuracy = 94.666666%, sw accuracy = 96.333331%
hw_err_cnt = 47, sw_err_cnt = 15
hw accuracy = 84.333330%, sw accuracy = 94.999999%
# 白線追従走行用のテスト用画像データをCの配列に出力し、ファイルに書き込み
# image_data2c_wt.py
# 2017/12/20 ：直進と左旋回、右旋回の画像数が違う場合の対応を追加した。 by marsee
# coding: utf-8
import sys, os
sys.path.append(os.pardir)
import numpy as np
from dataset_curve.curve_dataset import load_mnist
import datetime
OUTPUT_DATA_NUM = 100 # 出力する白線追従走行のテストデータ数 直進、左旋回、右旋回で x 3
OFFSET = 0 # 白線追従走行用データセットのオフセット、100だったら100番目からOUTPUT_DATA_NUM個を出力する
STRAIGHT_DATA_NUM = 15750 # 直進の総画像数
L_R_TURN_DATA_NUM = 5400 # 左旋回、右旋回の総画像数
def normal_image(offset, output_data_num, x_test, end):
for i in range(offset, offset+output_data_num):
f.write("\t{")
for j in range(x_test.shape[1]):
f.write(str(x_test[i][j]))
if (j==x_test.shape[1]-1):
if (i==offset+output_data_num-1 and end==1):
f.write("}\n")
else:
f.write("},\n")
else:
f.write(", ")
def no_normal_image(offset, output_data_num, x_test, end):
for i in range(offset, offset+output_data_num):
f.write("\t{")
for j in range(x_test.shape[1]):
f.write(str(int(x_test[i][j]*256)))
if (j==x_test.shape[1]-1):
if (i==offset+output_data_num-1 and end==1):
f.write("}\n")
else:
f.write("},\n")
else:
f.write(", ")
def normal_label(offset, output_data_num, t_test, end):
for i in range(offset, offset+output_data_num):
f.write("\t{")
for j in range(t_test.shape[1]):
f.write(str(t_test[i][j]))
if (j==t_test.shape[1]-1):
if (i==offset+output_data_num-1 and end==1):
f.write("}\n")
else:
f.write("},\n")
else:
f.write(", ")
# データの読み込み
(x_train, t_train), (x_test, t_test) = load_mnist(normalize=True, one_hot_label=True)
all_x_test = x_test.shape[0];
all_go_direction = int(all_x_test/3);
print(all_x_test)
print(all_go_direction)
f = open("curve_data.h", 'w')
todaytime = datetime.datetime.today()
f.write('// curve_data.h\n')
strdtime = todaytime.strftime("%Y/%m/%d %H:%M:%S")
f.write('// {0} by marsee\n'.format(strdtime))
f.write("\n")
f.write('ap_ufixed<8, 0, AP_TRN_ZERO, AP_SAT> t_train['+str(OUTPUT_DATA_NUM*3)+']['+str(x_test.shape[1])+'] = {\n')
normal_image(OFFSET, OUTPUT_DATA_NUM, x_test, 0) # 直進
normal_image(OFFSET+STRAIGHT_DATA_NUM, OUTPUT_DATA_NUM, x_test, 0) # 左旋回
normal_image(OFFSET+STRAIGHT_DATA_NUM+L_R_TURN_DATA_NUM, OUTPUT_DATA_NUM, x_test, 1) # 右旋回
f.write("};\n")
f.write('int t_train_256['+str(OUTPUT_DATA_NUM*3)+']['+str(x_test.shape[1])+'] = {\n')
no_normal_image(OFFSET, OUTPUT_DATA_NUM, x_test, 0) # 直進
no_normal_image(OFFSET+STRAIGHT_DATA_NUM, OUTPUT_DATA_NUM, x_test, 0) # 左旋回
no_normal_image(OFFSET+STRAIGHT_DATA_NUM+L_R_TURN_DATA_NUM, OUTPUT_DATA_NUM, x_test, 1) # 右旋回
f.write("};\n")
f.write("\n")
f.write('float t_test['+str(OUTPUT_DATA_NUM*3)+']['+str(t_test.shape[1])+'] = {\n')
normal_label(OFFSET, OUTPUT_DATA_NUM, t_test, 0) # 直進
normal_label(OFFSET+STRAIGHT_DATA_NUM, OUTPUT_DATA_NUM, t_test, 0) # 左旋回
normal_label(OFFSET+STRAIGHT_DATA_NUM+L_R_TURN_DATA_NUM, OUTPUT_DATA_NUM, t_test, 1) # 右旋回
f.write("};\n")
f.close()
MAGNIFICATION_CONV = 2 ** (9-1)
fwrite_conv_weight(network.params['W1'], 'conv1_weight.h', 'conv1_fweight', 'conv1_weight', MAGNIFICATION_CONV)
fwrite_bias(network.params['b1'], 'conv1_bias.h', 'conv1_fbias', 'conv1_bias', MAGNIFICATION_CONV)
MAGNIFICATION_AF = 2 ** (11-1)
fwrite_bias(network.params['b2'], 'af1_bias.h', 'af1_fbias', 'af1_bias', MAGNIFICATION_AF)
fwrite_bias(network.params['b3'], 'af2_bias.h', 'af2_fbias', 'af2_bias', MAGNIFICATION_AF)
fwrite_af_weight(network.params['W2'], 'af1_weight.h', 'af1_fweight', 'af1_weight', MAGNIFICATION_AF)
fwrite_af_weight(network.params['W3'], 'af2_weight.h', 'af2_fweight', 'af2_weight', MAGNIFICATION_AF)
(100, 1, 10, 56)
Conv col.shape = (31200, 25)
Conv col_W.shape = (25, 2)
Conv np.max(x) = 0.8705882430076599
Conv np.min(x) = 0.32549020648002625
(2, 1, 5, 5)
Conv np.max(self.W_int) = 0.79296875
Conv np.min(self.W_int) = -0.23828125
(2,)
Conv np.max(self.b_int) = 0.0
Conv np.min(self.b_int) = -1.0
Conv out.shape = (31200, 2)
Conv np.max(out) = 8.476914929691702
Conv np.min(out) = -0.03768382431007922
Conv np.max(out2) = 8.5
Conv np.min(out2) = 0.0
Conv out.reshape = (100, 2, 6, 52)
Pooling x.shape = (100, 2, 6, 52)
Pooling out.shape = (100, 2, 3, 26)
x shape =(100, 2, 3, 26)
np.max(self.W) = 0.5351036345618255
np.max(self.W) = 0.5351036345618255
np.max(self.b) = 0.30059633490491805
x reshape =(100, 156)
np.max(x) = 8.5
np.min(x) = 0.0
(156, 100)
np.max(self.W_int) = 0.53515625
np.min(self.W_int) = -0.357421875
(100,)
np.max(self.b_int) = 0.30078125
np.min(self.b_int) = -0.4248046875
(100, 100)
np.max(out) = 20.33831787109375
np.min(out) = -13.0367431640625
np.max(out2) = 20.34375
np.min(out2) = -13.0
x shape =(100, 100)
np.max(self.W) = 0.8667410516980987
np.max(self.W) = 0.8667410516980987
np.max(self.b) = 0.29596798816137226
x reshape =(100, 100)
np.max(x) = 20.34375
np.min(x) = 0.0
(100, 3)
np.max(self.W_int) = 0.8671875
np.min(self.W_int) = -0.98046875
(3,)
np.max(self.b_int) = 0.2958984375
np.min(self.b_int) = -0.3017578125
(100, 3)
np.max(out) = 7.79901123046875
np.min(out) = -16.07855224609375
np.max(out2) = 7.8125
np.min(out2) = -16.0625
に変更した。from dataset_curve.curve_dataset import load_mnist
# train_convnet.py
# 2017/08/08 白線追従走行用CNNに変更 by marsee
# 元になったコードは、https://github.com/oreilly-japan/deep-learning-from-scratch にあります。
# 改変したコードもMITライセンスとします。 2017/08/08 by marsee
# カーブ・データ用に修正 2017/12/18 by marsee
# coding: utf-8
import sys, os
sys.path.append(os.pardir) # 親ディレクトリのファイルをインポートするための設定
import numpy as np
import matplotlib.pyplot as plt
from dataset_curve.curve_dataset import load_mnist
from simple_convnet import SimpleConvNet
from common.trainer import Trainer
# データの読み込み
(x_train, t_train), (x_test, t_test) = load_mnist(flatten=False)
all_x_train = x_train.shape[0];
all_x_test = x_test.shape[0];
print(all_x_train)
print(all_x_test)
# 処理に時間のかかる場合はデータを削減
#x_train, t_train = x_train[:5000], t_train[:5000]
#x_test, t_test = x_test[:1000], t_test[:1000]
max_epochs = 20
network = SimpleConvNet(input_dim=(1,10,56),
conv_param = {'filter_num': 2, 'filter_size': 5, 'pad': 0, 'stride': 1},
#conv_param = {'filter_num': 30, 'filter_size': 5, 'pad': 0, 'stride': 1},
hidden_size=100, output_size=3, weight_init_std=0.01)
trainer = Trainer(network, x_train, t_train, x_test, t_test,
epochs=max_epochs, mini_batch_size=100,
optimizer='Adam', optimizer_param={'lr': 0.001},
evaluate_sample_num_per_epoch=100)
trainer.train()
# パラメータの保存
network.save_params("params.pkl")
print("Saved Network Parameters!")
Converting train_curve_run_image to NumPy Array ...
Done
Converting train_curve_run_label to NumPy Array ...
Done
Converting test_curve_run_image to NumPy Array ...
Done
Converting test_curve_run_label to NumPy Array ...
Done
Creating pickle file ...
Done!
34650
26550
pool_output_size =156
train loss:1.0981899475
=== epoch:1, train acc:1.0, test acc:1.0 ===
train loss:1.0980374466
train loss:1.0966096818
train loss:1.09627088932
train loss:1.09695438209
train loss:0.12427020397
train loss:0.0725574218453
train loss:0.0593783238407
train loss:0.0805719249781
train loss:0.0529893267479
train loss:0.0247235638705
train loss:0.0481303088163
train loss:0.0534950709832
train loss:0.10404449012
train loss:0.082864550859
train loss:0.091640690661
train loss:0.102096129491
train loss:0.0732472519834
train loss:0.068286296823
train loss:0.0726208094243
train loss:0.0522118761663
=============== Final Test Accuracy ===============
test acc:0.95472693032
Saved Network Parameters!
// curve_test_data.h
// 2017/07/24 by marsee
//
#ifndef __CURVE_DATASET_BMP_H__
#define __CURVE_DATASET_BMP_H__
#include "hls_video.h"
#define BMP_HEIGHT 600
#define BMP_WIDTH 800
#define REDUCTION_RATIO 0.075 // 1/13.3333... 60x45
#define DATASET_HEIGHT 10
#define DATASET_WIDTH 56
#define STRAIGHT_NUM_OF_IMAGE 630
#define LEFT_TURN_NUM_OF_IMAGE 216
#define RIGHT_TURN_NUM_OF_IMAGE 216
typedef hls::Scalar<3, unsigned char> RGB_PIXEL;
typedef hls::Mat<BMP_HEIGHT, BMP_WIDTH, HLS_8UC3> RGB_IMAGE;
typedef hls::Mat<BMP_HEIGHT, BMP_WIDTH, HLS_8UC1> GRAY_IMAGE;
#endif
// curve_test_data.cpp
// 2017/11/30 by marsee
//
#include <iostream>
#include "hls_opencv.h"
#include "curve_test_data.h"
#include <arpa/inet.h>
const char IMAGE_DIR[] = "test_images_171130";
int main(){
char straight_fn[256] = "straight_test";
char left_turn_fn[256] = "left_turn_test";
char right_turn_fn[256] = "right_turn_test";
char bmp_file[256];
FILE *ftin, *ftln;
char test_image_name[256] = "test_curve_run_image";
char test_label_name[256] = "test_curve_run_label";
uint32_t buf[5];
uint8_t bufchar[100];
if ((ftin = fopen(test_image_name, "wb")) == NULL){
fprintf(stderr, "Can't open %s\n", test_image_name);
exit(1);
}
if ((ftln = fopen(test_label_name, "wb")) == NULL){
fprintf(stderr, "Can't open %s\n", test_label_name);
exit(1);
}
// Writed header
buf[0] = htonl(0x803); // magic number
buf[1] = htonl((STRAIGHT_NUM_OF_IMAGE+LEFT_TURN_NUM_OF_IMAGE+RIGHT_TURN_NUM_OF_IMAGE)*25); // number of image
buf[2] = htonl(10); // number of rows (10)
buf[3] = htonl(56); // number of columns (56)
fwrite(buf, sizeof(uint32_t), 4, ftin);
buf[0] = htonl(0x801); // magic number
buf[1] = htonl((STRAIGHT_NUM_OF_IMAGE+LEFT_TURN_NUM_OF_IMAGE+RIGHT_TURN_NUM_OF_IMAGE)*25); // number of image
fwrite(buf, sizeof(uint32_t), 2, ftln);
// refereed to http://opencv.jp/cookbook/opencv_img.html
// straight
for(int i=0; i<STRAIGHT_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, straight_fn, i);
cv::Mat straight_img = cv::imread(bmp_file,1);
if(straight_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(straight_img.rows*0.075, straight_img.cols*0.075, straight_img.type());
cv::resize(straight_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", straight_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", straight_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x1;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
// left turn
for(int i=0; i<LEFT_TURN_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, left_turn_fn, i);
cv::Mat left_trun_img = cv::imread(bmp_file,1);
if(left_trun_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(left_trun_img.rows*0.075, left_trun_img.cols*0.075, left_trun_img.type());
cv::resize(left_trun_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", left_turn_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", left_turn_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x0;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
// right turn
for(int i=0; i<RIGHT_TURN_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, right_turn_fn, i);
cv::Mat right_trun_img = cv::imread(bmp_file,1);
if(right_trun_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(right_trun_img.rows*0.075, right_trun_img.cols*0.075, right_trun_img.type());
cv::resize(right_trun_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", right_turn_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", right_turn_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x2;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
fclose(ftin);
fclose(ftln);
return(0);
}
#!/bin/bash
# increase_images2
straight_max=35
lr_turn_max=12
# contrast
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -contrast straight_test$(expr $i + $straight_max).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -contrast left_turn_test$(expr $i + $lr_turn_max).bmp
convert right_turn_test$i.bmp -contrast right_turn_test$(expr $i + $lr_turn_max).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -contrast -contrast straight_test$(expr $i + $straight_max \* 2).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -contrast -contrast left_turn_test$(expr $i + $lr_turn_max \* 2).bmp
convert right_turn_test$i.bmp -contrast -contrast right_turn_test$(expr $i + $lr_turn_max \* 2).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -contrast -contrast -contrast straight_test$(expr $i + $straight_max \* 3).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -contrast -contrast -contrast left_turn_test$(expr $i + $lr_turn_max \* 3).bmp
convert right_turn_test$i.bmp -contrast -contrast -contrast right_turn_test$(expr $i + $lr_turn_max \* 3).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +contrast straight_test$(expr $i + $straight_max \* 4).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +contrast left_turn_test$(expr $i + $lr_turn_max \* 4).bmp
convert right_turn_test$i.bmp +contrast right_turn_test$(expr $i + $lr_turn_max \* 4).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +contrast +contrast straight_test$(expr $i + $straight_max \* 5).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +contrast +contrast left_turn_test$(expr $i + $lr_turn_max \* 5).bmp
convert right_turn_test$i.bmp +contrast +contrast right_turn_test$(expr $i + $lr_turn_max \* 5).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +contrast +contrast +contrast straight_test$(expr $i + $straight_max \* 6).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +contrast +contrast +contrast left_turn_test$(expr $i + $lr_turn_max \* 6).bmp
convert right_turn_test$i.bmp +contrast +contrast +contrast right_turn_test$(expr $i + $lr_turn_max \* 6).bmp
done
# blur
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -blur 10x1.5 straight_test$(expr $i + $straight_max \* 7).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -blur 10x1.5 left_turn_test$(expr $i + $lr_turn_max \* 7).bmp
convert right_turn_test$i.bmp -blur 10x1.5 right_turn_test$(expr $i + $lr_turn_max \* 7).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -blur 10x2 straight_test$(expr $i + $straight_max \* 8).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -blur 10x2 left_turn_test$(expr $i + $lr_turn_max \* 8).bmp
convert right_turn_test$i.bmp -blur 10x2 right_turn_test$(expr $i + $lr_turn_max \* 8).bmp
done
# gaussian-blur
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -blur 10x1.5 straight_test$(expr $i + $straight_max \* 9).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -gaussian-blur 10x1.5 left_turn_test$(expr $i + $lr_turn_max \* 9).bmp
convert right_turn_test$i.bmp -blur 10x1.5 right_turn_test$(expr $i + $lr_turn_max \* 9).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -blur 10x2 straight_test$(expr $i + $straight_max \* 10).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -gaussian-blur 10x2 left_turn_test$(expr $i + $lr_turn_max \* 10).bmp
convert right_turn_test$i.bmp -blur 10x2 right_turn_test$(expr $i + $lr_turn_max \* 10).bmp
done
#gamma
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -gamma 1.5 straight_test$(expr $i + $straight_max \* 11).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -gamma 1.5 left_turn_test$(expr $i + $lr_turn_max \* 11).bmp
convert right_turn_test$i.bmp -gamma 1.5 right_turn_test$(expr $i + $lr_turn_max \* 11).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp -gamma 0.75 straight_test$(expr $i + $straight_max \* 12).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp -gamma 0.75 left_turn_test$(expr $i + $lr_turn_max \* 12).bmp
convert right_turn_test$i.bmp -gamma 0.75 right_turn_test$(expr $i + $lr_turn_max \* 12).bmp
done
#noise
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +noise Gaussian straight_test$(expr $i + $straight_max \* 13).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +noise Gaussian left_turn_test$(expr $i + $lr_turn_max \* 13).bmp
convert right_turn_test$i.bmp +noise Gaussian right_turn_test$(expr $i + $lr_turn_max \* 13).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +noise Impulse straight_test$(expr $i + $straight_max \* 14).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +noise Impulse left_turn_test$(expr $i + $lr_turn_max \* 14).bmp
convert right_turn_test$i.bmp +noise Impulse right_turn_test$(expr $i + $lr_turn_max \* 14).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +noise Gaussian straight_test$(expr $i + $straight_max \* 15).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +noise Gaussian left_turn_test$(expr $i + $lr_turn_max \* 15).bmp
convert right_turn_test$i.bmp +noise Gaussian right_turn_test$(expr $i + $lr_turn_max \* 15).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +noise Impulse straight_test$(expr $i + $straight_max \* 16).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +noise Impulse left_turn_test$(expr $i + $lr_turn_max \* 16).bmp
convert right_turn_test$i.bmp +noise Impulse right_turn_test$(expr $i + $lr_turn_max \* 16).bmp
done
for ((i=0; i < $straight_max; i++)); do
convert straight_test$i.bmp +noise Laplacian straight_test$(expr $i + $straight_max \* 17).bmp
done
for ((i=0; i < $lr_turn_max; i++)); do
convert left_turn_test$i.bmp +noise Laplacian left_turn_test$(expr $i + $lr_turn_max \* 17).bmp
convert right_turn_test$i.bmp +noise Laplacian right_turn_test$(expr $i + $lr_turn_max \* 17).bmp
done
// curve_dataset_bmp.h
// 2017/11/29 by marsee
//
#ifndef __CURVE_DATASET_BMP_H__
#define __CURVE_DATASET_BMP_H__
#include "hls_video.h"
#define BMP_HEIGHT 600
#define BMP_WIDTH 800
#define REDUCTION_RATIO 0.075 // 1/13.3333... 60x45
#define DATASET_HEIGHT 10
#define DATASET_WIDTH 56
#define STRAIGHT_BMP_FILE_NAME straight
#define LEFT_TURN_BMP_FILE_NAME left_turn
#define RIGHT_TURN_BMP_FILE_NAME right_turn
#define STRAIGHT_NUM_OF_IMAGE 738
#define LEFT_TURN_NUM_OF_IMAGE 324
#define RIGHT_TURN_NUM_OF_IMAGE 324
typedef hls::Scalar<3, unsigned char> RGB_PIXEL;
typedef hls::Mat<BMP_HEIGHT, BMP_WIDTH, HLS_8UC3> RGB_IMAGE;
typedef hls::Mat<BMP_HEIGHT, BMP_WIDTH, HLS_8UC1> GRAY_IMAGE;
#endif
// curve_dataset_bmp_nowr.cpp
// 2017/11/29 by marsee
//
#include <iostream>
#include "hls_opencv.h"
#include "curve_dataset_bmp.h"
#include <arpa/inet.h>
const char IMAGE_DIR[] = "train_data_171129";
int main(){
char straight_fn[256] = "straight";
char left_turn_fn[256] = "left_turn";
char right_turn_fn[256] = "right_turn";
char bmp_file[256];
FILE *ftin, *ftln;
char train_image_name[256] = "train_curve_run_image";
char train_label_name[256] = "train_curve_run_label";
uint32_t buf[5];
uint8_t bufchar[100];
if ((ftin = fopen(train_image_name, "wb")) == NULL){
fprintf(stderr, "Can't open %s\n", train_image_name);
exit(1);
}
if ((ftln = fopen(train_label_name, "wb")) == NULL){
fprintf(stderr, "Can't open %s\n", train_label_name);
exit(1);
}
// Writed header
buf[0] = htonl(0x803); // magic number
buf[1] = htonl((STRAIGHT_NUM_OF_IMAGE+LEFT_TURN_NUM_OF_IMAGE+RIGHT_TURN_NUM_OF_IMAGE)*25); // number of image
buf[2] = htonl(10); // number of rows (10)
buf[3] = htonl(56); // number of columns (56)
fwrite(buf, sizeof(uint32_t), 4, ftin);
buf[0] = htonl(0x801); // magic number
buf[1] = htonl((STRAIGHT_NUM_OF_IMAGE+LEFT_TURN_NUM_OF_IMAGE+RIGHT_TURN_NUM_OF_IMAGE)*25); // number of image
fwrite(buf, sizeof(uint32_t), 2, ftln);
// refereed to http://opencv.jp/cookbook/opencv_img.html
// straight
for(int i=0; i<STRAIGHT_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, straight_fn, i);
cv::Mat straight_img = cv::imread(bmp_file,1);
if(straight_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(straight_img.rows*0.075, straight_img.cols*0.075, straight_img.type());
cv::resize(straight_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", straight_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", straight_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x1;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
// left turn
for(int i=0; i<LEFT_TURN_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, left_turn_fn, i);
cv::Mat left_turn_img = cv::imread(bmp_file,1);
if(left_turn_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(left_turn_img.rows*0.075, left_turn_img.cols*0.075, left_turn_img.type());
cv::resize(left_turn_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", left_turn_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", left_turn_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x0;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
// right turn
for(int i=0; i<RIGHT_TURN_NUM_OF_IMAGE; i++){
sprintf(bmp_file, "%s/%s%d.bmp", IMAGE_DIR, right_turn_fn, i);
cv::Mat right_turn_img = cv::imread(bmp_file,1);
if(right_turn_img.empty()){
fprintf(stderr,"Error: %s\n", bmp_file);
return(-1);
}
cv::Mat reduct_img(right_turn_img.rows*0.075, right_turn_img.cols*0.075, right_turn_img.type());
cv::resize(right_turn_img, reduct_img, reduct_img.size(), cv::INTER_LINEAR);
cv::Mat gray_img;
cv::cvtColor(reduct_img, gray_img, CV_BGR2GRAY);
//sprintf(bmp_file, "%s_RED%d.bmp", right_turn_fn, i);
//cv::imwrite(bmp_file, gray_img);
for(int y=0; y<5; y++){
for(int x=0; x<5; x++){
cv::Rect rect_center(x, 30+y, 56, 10);
cv::Mat img_rect(gray_img, rect_center);
//sprintf(bmp_file, "%s_RED_rect%d_%d%d.bmp", right_turn_fn, i, y, x);
//cv::imwrite(bmp_file, img_rect);
for(int iy=0; iy<img_rect.rows; iy++){
for(int ix=0; ix<img_rect.cols; ix++){
bufchar[ix] = img_rect.at<uchar>(iy, ix);
}
fwrite(bufchar, sizeof(uint8_t), img_rect.cols, ftin); // image write
}
bufchar[0] = 0x2;
fwrite(bufchar, sizeof(uint8_t), 1, ftln); // label write
}
}
}
fclose(ftin);
fclose(ftln);
return(0);
}
// test_dma_wd.c
// test_dma with drivers
// 2017/12/14 by marsee
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
#include "xdma_pow2.h"
int main(){
int fd1, fd2;
XDma_pow2 xdma_ap;
int Xdma_status;
volatile unsigned int *cma_buffer;
char attr[1024];
unsigned long phys_addr;
int i;
// Initialize the Device
Xdma_status = XDma_pow2_Initialize(&xdma_ap, "dma_pow2");
if (Xdma_status != XST_SUCCESS){
fprintf(stderr, "Could not Initialize XDma_pow2\n");
return(-1);
}
// udmabuf0
fd1 = open("/dev/udmabuf0", O_RDWR); // frame_buffer, The chache is enabled.
if (fd1 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
cma_buffer = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!cma_buffer){
fprintf(stderr, "cma_buffer mmap error\n");
exit(-1);
}
// phys_addr of udmabuf0
fd2 = open("/sys/class/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd2 == -1){
fprintf(stderr, "/sys/class/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd2, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd2);
printf("phys_addr = %x\n", (int)phys_addr);
XDma_pow2_Set_in_r(&xdma_ap, phys_addr);
XDma_pow2_Set_out_r(&xdma_ap, phys_addr+sizeof(int)*10);
for(i=0; i<10; i++)
cma_buffer[i] = i;
XDma_pow2_Start(&xdma_ap);
while(!XDma_pow2_IsDone(&xdma_ap)) ;
printf("in[] = ");
for(i=0; i<10; i++)
printf("%2d ", cma_buffer[i]);
printf("\n");
printf("out[] = ");
for(i=10; i<20; i++)
printf("%2d ", cma_buffer[i]);
printf("\n");
munmap((void *)cma_buffer, 0x10000);
close(fd1);
return(0);
}
# Makefile(test_dma_wd.c)
# Referred to http://www.ie.u-ryukyu.ac.jp/~e085739/c.makefile.tuts.html
PROGRAM = test_dma_wd
OBJS = test_dma_wd.o xdma_pow2.o xdma_pow2_linux.o
CC = gcc
CFLAGS = -Wall -O2
.SUFFIXES: .c .o
.PHONY: all
all: test_dma_wd
test_dma_wd: $(OBJS)
$(CC) -Wall -o $@ $(OBJS)
.c.o:
$(CC) $(CFLAGS) -c $<
.PHONY: clean
clean:
$(RM) $(PROGRAM) $(OBJS)
/dts-v1/; /plugin/;
/ {
fragment@1 {
target-path = "/amba/fpga-region0";
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <1>;
firmware-name = "test_dma_wrapper.bin";
dma_pow2@43c00000 {
compatible = "generic-uio";
reg = <0x43c00000 0x10000>;
#interrupts = <0x0 0x1d 0x4>;
};
udmabuf0@0x00 {
compatible = "ikwzm,udmabuf-0.10.a";
device-name = "udmabuf0";
size = <0x00010000>;
};
};
};
};
// test_dma.c
// 2017/12/12 by marsee
//
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <assert.h>
#include <sys/mman.h>
#include <fcntl.h>
int main(){
int fd0, fd1, fd2;
volatile unsigned int *dma_pow2_0;
volatile unsigned int *cma_buffer;
char attr[1024];
unsigned long phys_addr;
int i;
// dma_pow2_0 (UIO0)
fd0 = open("/dev/uio0", O_RDWR); // dma_pow2_0 interface AXI4 Lite Slave
if (fd0 < 1){
fprintf(stderr, "/dev/uio0 (dma_pow2_0) open error\n");
exit(-1);
}
dma_pow2_0 = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd0, 0);
if (!dma_pow2_0){
fprintf(stderr, "dma_pow2_0 mmap error\n");
exit(-1);
}
// udmabuf0
fd1 = open("/dev/udmabuf0", O_RDWR); // frame_buffer, The chache is enabled.
if (fd1 == -1){
fprintf(stderr, "/dev/udmabuf0 open error\n");
exit(-1);
}
cma_buffer = (volatile unsigned *)mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd1, 0);
if (!cma_buffer){
fprintf(stderr, "cma_buffer mmap error\n");
exit(-1);
}
// phys_addr of udmabuf0
fd2 = open("/sys/class/udmabuf/udmabuf0/phys_addr", O_RDONLY);
if (fd2 == -1){
fprintf(stderr, "/sys/class/udmabuf/udmabuf0/phys_addr open error\n");
exit(-1);
}
read(fd2, attr, 1024);
sscanf(attr, "%lx", &phys_addr);
close(fd2);
printf("phys_addr = %x\n", (int)phys_addr);
dma_pow2_0[6] = phys_addr; // 0x18 Data signal of in_r
dma_pow2_0[8] = phys_addr+sizeof(int)*10; // 0x20 Data signal of out_r
for(i=0; i<10; i++)
cma_buffer[i] = i;
dma_pow2_0[0] = 1; // Start
while(!(dma_pow2_0[0] & 0x2)); // wait done signal
printf("in[] = ");
for(i=0; i<10; i++)
printf("%2d ", cma_buffer[i]);
printf("\n");
printf("out[] = ");
for(i=10; i<20; i++)
printf("%2d ", cma_buffer[i]);
printf("\n");
munmap((void *)dma_pow2_0, 0x10000);
munmap((void *)cma_buffer, 0x10000);
close(fd0);
close(fd1);
return(0);
}
/dts-v1/; /plugin/;
/ {
fragment@1 {
target-path = "/amba/fpga-region0";
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <1>;
firmware-name = "test_dma_wrapper.bin";
dma_pow2@43c00000 {
compatible = "generic-uio";
reg = <0x43c10000 0x10000>;
#interrupts = <0x0 0x1d 0x4>;
};
};
};
};
/dts-v1/;
/ {
fragment@0 {
target-path = "/amba";
__overlay__ {
#address-cells = <0x1>;
#size-cells = <0x1>;
dma_pow2@43c00000 {
compatible = "generic-uio";
reg = <0x43c00000 0x10000>;
#interrupts = <0x0 0x1d 0x4>;
};
};
};
};
だった。/config/device-tree/overlays/dma_pow2/dtbo: Warning (unit_address_vs_reg): Node /fragment@0 has a unit name, but no reg property
component void vector_add(int* a,
int* b,
int* c,
int N) {
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
component void vector_add(ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<16>, ihc::dwidth<32> >& a,
ihc::mm_master<int, ihc::aspace<2>, ihc::awidth<16>, ihc::dwidth<32> >& b,
ihc::mm_master<int, ihc::aspace<3>, ihc::awidth<16>, ihc::dwidth<32> >& c,
int N) {
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
component void vector_add(ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& a, // bank 1
ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& b, // bank 1
ihc::mm_master<int, ihc::aspace<2>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& c, // bank 2
int N) {
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
component void vector_add(ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& a, // bank 1
ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& b, // bank 1
ihc::mm_master<int, ihc::aspace<2>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::waitrequest<true> >& c, // bank 2
int N) {
#pragma unroll 8
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
component void vector_add(ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::align<32>, ihc::waitrequest<true> >& a, // bank 1
ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::align<32>, ihc::waitrequest<true> >& b, // bank 1
ihc::mm_master<int, ihc::aspace<2>, ihc::awidth<32>, ihc::dwidth<256>, ihc::latency<0>, ihc::maxburst<8>, ihc::align<32>, ihc::waitrequest<true> >& c, // bank 2
int N) {
#pragma unroll 8
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
component void vector_add(ihc::mm_master<int, ihc::aspace<1>, ihc::awidth<16>, ihc::dwidth<32>, ihc::latency<0> >& a,
ihc::mm_master<int, ihc::aspace<2>, ihc::awidth<16>, ihc::dwidth<32>, ihc::latency<0> >& b,
ihc::mm_master<int, ihc::aspace<3>, ihc::awidth<16>, ihc::dwidth<32>, ihc::latency<0> >& c,
int N) {
for (int i = 0; i < N; ++i) {
c[i] = a[i] + b[i];
}
}
から抜けてこなかったのだ。どうしてか分からないが、ACP ポートではVivado HLS で作成した Dma_pow2 IP がDone にならないようだ？while(!XDma_pow2_IsDone(&XMluti_ap)) ;
/* * test_dma.c * * Created on: 2017/12/02 * Author: masaaki */
#include <stdio.h>
#include "xdma_pow2.h"
#include "xparameters.h"
volatile int data[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
volatile int result[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
int main(){
XDma_pow2 XMluti_ap;
XDma_pow2_Config *XMulti_apPtr;
int i;
// Look Up the device configuration
XMulti_apPtr = XDma_pow2_LookupConfig(0);
if (!XMulti_apPtr){
fprintf(stderr, "XMulti_apuint configuration failed.\n");
return(-1);
}
// Initialize the Device
int Xlap_status = XDma_pow2_CfgInitialize(&XMluti_ap, XMulti_apPtr);
if (Xlap_status != XST_SUCCESS){
fprintf(stderr, "Could not Initialize XMulti_apuint\n");
return(-1);
}
XDma_pow2_Set_in_r(&XMluti_ap, (u32)&data[0]);
XDma_pow2_Set_out_r(&XMluti_ap, (u32)&result[0]);
XDma_pow2_Start(&XMluti_ap);
while(!XDma_pow2_IsDone(&XMluti_ap)) ;
for(i=0; i<10; i++){
printf("data[%d] = %d, result[%d] = %d\n", i, data[i], i, result[i]);
}
return 0;
}
をvolatile int result[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
にしてみよう。volatile int result[10];
| 日 | 月 | 火 | 水 | 木 | 金 | 土 |
|---|---|---|---|---|---|---|
| - | - | - | - | - | 1 | 2 |
| 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| 10 | 11 | 12 | 13 | 14 | 15 | 16 |
| 17 | 18 | 19 | 20 | 21 | 22 | 23 |
| 24 | 25 | 26 | 27 | 28 | 29 | 30 |
| 31 | - | - | - | - | - | - |