ConstraintSystem:59 - Constraint
[Sources/ddr2_sdram_cont_test.ucf(40)]: NET "ddr2_clkb" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.
ConstraintSystem:59 - Constraint
[Sources/ddr2_sdram_cont_test.ucf(41)]: NET "ddr2_clk" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.
output wire [QUANTITY_OF_CLK_OUTPUT-1 : 0] ddr2_clk; // DDR2のCLK
output wire [QUANTITY_OF_CLK_OUTPUT-1 : 0] ddr2_clkb; // DDR2のCLKB
NET "ddr2_clkb" LOC = "M2" |IOSTANDARD = SSTL18_II ;
NET "ddr2_clk" LOC = "M1" |IOSTANDARD = SSTL18_II ;
NET "ddr2_clkb(0)" LOC = "M2" |IOSTANDARD = SSTL18_II ;
NET "ddr2_clk(0)" LOC = "M1" |IOSTANDARD = SSTL18_II ;
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31 | - | - | - | - | - | - |