cl::Event event;
uint64_t lapf_start, lapf_end;
//Launch the Kernel
q.enqueueTask(krnl_lap_filter);
// The result of the previous kernel execution will need to be retrieved in
// order to view the results. This call will transfer the data from FPGA to
// source_results vector
q.enqueueMigrateMemObjects({hw_lapd_buf},CL_MIGRATE_MEM_OBJECT_HOST);
q.finish();
// 時間計測
event.getProfilingInfo<uint64_t>(CL_PROFILING_COMMAND_START, &lapf_start);
event.getProfilingInfo<uint64_t>(CL_PROFILING_COMMAND_END, &lapf_end);
auto lapf_time = lapf_end - lapf_start;
printf("laplacian_filter1: %23lu ns\n", lapf_time);
// 時間計測
struct timeval start_time, end_time;
gettimeofday(&start_time, NULL);
//Launch the Kernel
q.enqueueTask(krnl_lap_filter);
// The result of the previous kernel execution will need to be retrieved in
// order to view the results. This call will transfer the data from FPGA to
// source_results vector
q.enqueueMigrateMemObjects({hw_lapd_buf},CL_MIGRATE_MEM_OBJECT_HOST);
q.finish();
// 時間計測
gettimeofday(&end_time, NULL);
if (end_time.tv_usec < start_time.tv_usec) {
printf("total time = %ld.%06ld sec\n", end_time.tv_sec - start_time.tv_sec - 1, 1000000 + end_time.tv_usec - start_time.tv_usec);
}
else {
printf("total time = %ld.%06ld sec\n", end_time.tv_sec - start_time.tv_sec, end_time.tv_usec - start_time.tv_usec);
}
ultra96v2_min2 login: root
root@ultra96v2_min2:~# insmod /lib/modules/4.19.0-xilinx-v2019.2/extra/zocl.ko
[ 35.365631] zocl: loading out-of-tree module taints kernel.
[ 35.374889] [drm] Probing for xlnx,zocl
[ 35.378842] [drm] FPGA programming device pcap founded.
[ 35.384062] [drm] PR Isolation addr 0x0
[ 35.384788] [drm] Initialized zocl 2018.2.1 20180313 for a0000000.zyxclmm_drm on minor 1
root@ultra96v2_min2:~# cd /run/media/mmcblk0p1/
root@ultra96v2_min2:/run/media/mmcblk0p1# export XILINX_XRT=/usr
root@ultra96v2_min2:/run/media/mmcblk0p1# ./laplacian_filter1.exe lap_filter_axim.xclbin
Using FPGA binary file specfied through the command line: lap_filter_axim.xclbin
[ 44.524112] [drm] Pid 2175 opened device
[ 44.528070] [drm] Pid 2175 closed device
[ 44.543051] [drm] Pid 2175 opened device
Found Platform
Platform Name: Xilinx
Loading: 'lap_filter_axim.xclbin'
[ 44.837024] [drm] Finding IP_LAYOUT section header
[ 44.837038] [drm] Section IP_LAYOUT details:
[ 44.841914] [drm] offset = 0x54fcf8
[ 44.846176] [drm] size = 0x58
[ 44.849841] [drm] Finding DEBUG_IP_LAYOUT section header
[ 44.852983] [drm] AXLF section DEBUG_IP_LAYOUT header not found
[ 44.858288] [drm] Finding CONNECTIVITY section header
[ 44.864196] [drm] Section CONNECTIVITY details:
[ 44.869238] [drm] offset = 0x54fd50
[ 44.873763] [drm] size = 0x1c
[ 44.877474] [drm] Finding MEM_TOPOLOGY section header
[ 44.880619] [drm] Section MEM_TOPOLOGY details:
[ 44.885663] [drm] offset = 0x54fc00
[ 44.890184] [drm] size = 0xf8
[ 44.895496] [drm] No ERT scheduler on MPSoC, using KDS
[ 44.904186] [drm] Fail to install CU 0 interrupt handler: -22. Fall back to polling mode.
[ 44.912358] [drm] scheduler config ert(0)
[ 44.912365] [drm] cus(1)
[ 44.916372] [drm] slots(16)
[ 44.919073] [drm] num_cu_masks(1)
[ 44.922030] [drm] cu_shift(16)
[ 44.925506] [drm] cu_base(0xa0000000)
total time = 0.005286 sec
Success HW and SW results match
[ 44.928725] [drm] polling(1)
[ 44.944898] [drm] zocl_free_userptr_bo: obj 0x0000000071419c19
[ 44.951976] [drm] zocl_free_userptr_bo: obj 0x0000000087f37e9e
[ 44.962066] [drm] Pid 2175 closed device
root@ultra96v2_min2:/run/media/mmcblk0p1# ./laplacian_filter1.exe lap_filter_axim.xclbin
Using FPGA binary file specfied through the command line: lap_fil[ 63.265894] [drm] Pid 2183 opened device
ter_axim.xclbin
[ 63.274411] [drm] Pid 2183 closed device
[ 63.280195] [drm] Pid 2183 opened device
Found Platform
Platform Name: Xilinx
Loading: 'lap_filter_axim.xclbin'
[ 63.319807] [drm] The XCLBIN already loaded. Don't need to reload.
[ 63.321429] [drm] Reconfiguration not supported
[ 63.336946] [drm] User buffer is not physical contiguous
[ 63.342258] [drm] zocl_free_userptr_bo: obj 0x00000000838768cc
[ 63.343502] [drm] User buffer is not physical contiguous
total time = 0.005034 sec
Success HW and SW results match
[ 63.354671] [drm] zocl_free_userptr_bo: obj 0x00000000c279b619
[ 63.388743] [drm] Pid 2183 closed device
root@ultra96v2_min2:/run/media/mmcblk0p1# ./laplacian_filter1.exe lap_filter_axim.xclbin
Using FPGA binary file specfied through the command line: lap_fil[ 67.393815] [drm] Pid 2191 opened device
ter_axim.xclbin
[ 67.402303] [drm] Pid 2191 closed device
[ 67.408002] [drm] Pid 2191 opened device
Found Platform
Platform Name: Xilinx
Loading: 'lap_filter_axim.xclbin'
[ 67.447900] [drm] The XCLBIN already loaded. Don't need to reload.
[ 67.449501] [drm] Reconfiguration not supported
[ 67.464983] [drm] User buffer is not physical contiguous
[ 67.470296] [drm] zocl_free_userptr_bo: obj 0x00000000743cfe90
[ 67.471283] [drm] User buffer is not physical contiguous
total time = 0.004995 sec
Success HW and SW results match
[ 67.482428] [drm] zocl_free_userptr_bo: obj 0x00000000892f7931
[ 67.493126] [drm] Pid 2191 closed device
root@ultra96v2_min2:/run/media/mmcblk0p1# ./laplacian_filter1.exe lap_filter_axim.xclbin
Using FPGA binary file specfied through the command line: lap_fil[ 77.145820] [drm] Pid 2199 opened device
ter_axim.xclbin
[ 77.154301] [drm] Pid 2199 closed device
[ 77.159842] [drm] Pid 2199 opened device
Found Platform
Platform Name: Xilinx
Loading: 'lap_filter_axim.xclbin'
[ 77.199447] [drm] The XCLBIN already loaded. Don't need to reload.
[ 77.201013] [drm] Reconfiguration not supported
[ 77.216169] [drm] User buffer is not physical contiguous
[ 77.221485] [drm] zocl_free_userptr_bo: obj 0x00000000743cfe90
[ 77.222511] [drm] User buffer is not physical contiguous
total time = 0.005021 sec
Success HW and SW results match
[ 77.233646] [drm] zocl_free_userptr_bo: obj 0x0000000055b3bfae
[ 77.247102] [drm] Pid 2199 closed device
// laplacian_filter1_host.cpp
// 2019/12/09 by marsee
// 2019/12/19 : gettimeofday()を使用した時間計測コードを追加した
//
// Vitis-Tutorials/docs/mixing-c-rtl-kernels/reference-files/src/host/host_step1.cpp のコードを引用します
// https://github.com/Xilinx/Vitis-Tutorials/blob/master/docs/mixing-c-rtl-kernels/reference-files/src/host/host_step1.cpp
#define CL_HPP_CL_1_2_DEFAULT_BUILD
#define CL_HPP_TARGET_OPENCL_VERSION 120
#define CL_HPP_MINIMUM_OPENCL_VERSION 120
#define CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY 1
#define CL_USE_DEPRECATED_OPENCL_1_2_APIS
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <vector>
#include <CL/cl2.hpp>
#include <iostream>
#include <fstream>
#include <CL/cl_ext_xilinx.h>
#include <unistd.h>
#include <limits.h>
#include <sys/stat.h>
#include <sys/time.h>
#include "bmp_header.h"
int laplacian_fil_soft(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2);
int conv_rgb2y_soft(int rgb);
int lap_filter_axim(volatile int *cam_fb, volatile int *lap_fb); // hardware
void laplacian_filter_soft(int *cam_fb, int *lap_fb, long width, long height); // software
static const std::string error_message =
"Error: Result mismatch:\n"
"i = %d CPU result = %d Device result = %d\n";
//Some Library functions to be used.
template <typename T>
struct aligned_allocator
{
using value_type = T;
T* allocate(std::size_t num)
{
void* ptr = nullptr;
if (posix_memalign(&ptr,4096,num*sizeof(T)))
throw std::bad_alloc();
return reinterpret_cast<T*>(ptr);
}
void deallocate(T* p, std::size_t num)
{
free(p);
}
};
#define OCL_CHECK(error,call) \
call; \
if (error != CL_SUCCESS) { \
printf("%s:%d Error calling " #call ", error code is: %d\n", \
__FILE__,__LINE__, error); \
exit(EXIT_FAILURE); \
}
namespace xcl {
std::vector<cl::Device> get_devices(const std::string& vendor_name) {
size_t i;
cl_int err;
std::vector<cl::Platform> platforms;
OCL_CHECK(err, err = cl::Platform::get(&platforms));
cl::Platform platform;
for (i = 0 ; i < platforms.size(); i++){
platform = platforms[i];
OCL_CHECK(err, std::string platformName = platform.getInfo<CL_PLATFORM_NAME>(&err));
if (platformName == vendor_name){
std::cout << "Found Platform" << std::endl;
std::cout << "Platform Name: " << platformName.c_str() << std::endl;
break;
}
}
if (i == platforms.size()) {
std::cout << "Error: Failed to find Xilinx platform" << std::endl;
exit(EXIT_FAILURE);
}
//Getting ACCELERATOR Devices and selecting 1st such device
std::vector<cl::Device> devices;
OCL_CHECK(err, err = platform.getDevices(CL_DEVICE_TYPE_ACCELERATOR, &devices));
return devices;
}
std::vector<cl::Device> get_xil_devices() {
return get_devices("Xilinx");
}
char* read_binary_file(const std::string &xclbin_file_name, unsigned &nb)
{
std::cout << "INFO: Reading " << xclbin_file_name << std::endl;
if(access(xclbin_file_name.c_str(), R_OK) != 0) {
printf("ERROR: %s xclbin not available please build\n", xclbin_file_name.c_str());
exit(EXIT_FAILURE);
}
//Loading XCL Bin into char buffer
std::cout << "Loading: '" << xclbin_file_name.c_str() << "'\n";
std::ifstream bin_file(xclbin_file_name.c_str(), std::ifstream::binary);
bin_file.seekg (0, bin_file.end);
nb = bin_file.tellg();
bin_file.seekg (0, bin_file.beg);
char *buf = new char [nb];
bin_file.read(buf, nb);
return buf;
}
};
int main(int argc, char* argv[])
{
long x, y;
BITMAPFILEHEADER bmpfhr; // BMPファイルのファイルヘッダ(for Read)
BITMAPINFOHEADER bmpihr; // BMPファイルのINFOヘッダ(for Read)
FILE *fbmpr, *fbmpw;
int blue, green, red;
const char* xclbinFilename;
if (argc==2) {
xclbinFilename = argv[1];
std::cout <<"Using FPGA binary file specfied through the command line: " << xclbinFilename << std::endl;
}
else {
xclbinFilename = "../lap_filter_axim.xclbin";
std::cout << "No FPGA binary file specified through the command line, using:" << xclbinFilename <<std::endl;
}
if ((fbmpr = fopen("test.bmp", "rb")) == NULL){ // test.bmp をオープン
fprintf(stderr, "Can't open test.bmp by binary read mode\n");
exit(1);
}
// bmpヘッダの読み出し
fread(&bmpfhr.bfType, sizeof(uint16_t), 1, fbmpr);
fread(&bmpfhr.bfSize, sizeof(uint32_t), 1, fbmpr);
fread(&bmpfhr.bfReserved1, sizeof(uint16_t), 1, fbmpr);
fread(&bmpfhr.bfReserved2, sizeof(uint16_t), 1, fbmpr);
fread(&bmpfhr.bfOffBits, sizeof(uint32_t), 1, fbmpr);
fread(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpr);
// ピクセルを入れるメモリをアロケートする
std::vector<int,aligned_allocator<int>> rd_bmp(bmpihr.biWidth * bmpihr.biHeight);
std::vector<int,aligned_allocator<int>> hw_lapd(bmpihr.biWidth * bmpihr.biHeight);
std::vector<int,aligned_allocator<int>> sw_lapd(bmpihr.biWidth * bmpihr.biHeight);
size_t size_in_bytes = (bmpihr.biWidth * bmpihr.biHeight) * sizeof(int);
// rd_bmp にBMPのピクセルを代入。その際に、行を逆転する必要がある
for (y=0; y<bmpihr.biHeight; y++){
for (x=0; x<bmpihr.biWidth; x++){
blue = fgetc(fbmpr);
green = fgetc(fbmpr);
red = fgetc(fbmpr);
rd_bmp[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] = (blue & 0xff) | ((green & 0xff)<<8) | ((red & 0xff)<<16);
}
}
fclose(fbmpr);
std::vector<cl::Device> devices = xcl::get_xil_devices();
cl::Device device = devices[0];
devices.resize(1);
// Creating Context and Command Queue for selected device
cl::Context context(device);
cl::CommandQueue q(context, device, CL_QUEUE_PROFILING_ENABLE);
// Load xclbin
std::cout << "Loading: '" << xclbinFilename << "'\n";
std::ifstream bin_file(xclbinFilename, std::ifstream::binary);
bin_file.seekg (0, bin_file.end);
unsigned nb = bin_file.tellg();
bin_file.seekg (0, bin_file.beg);
char *buf = new char [nb];
bin_file.read(buf, nb);
// Creating Program from Binary File
cl::Program::Binaries bins;
bins.push_back({buf,nb});
cl::Program program(context, devices, bins);
// This call will get the kernel object from program. A kernel is an
// OpenCL function that is executed on the FPGA.
cl::Kernel krnl_lap_filter(program,"lap_filter_axim");
// These commands will allocate memory on the Device. The cl::Buffer objects can
// be used to reference the memory locations on the device.
cl::Buffer rd_bmp_buf(context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_ONLY,
size_in_bytes, rd_bmp.data());
cl::Buffer hw_lapd_buf(context, CL_MEM_USE_HOST_PTR | CL_MEM_READ_WRITE,
size_in_bytes, hw_lapd.data());
// Data will be transferred from system memory over PCIe to the FPGA on-board
// DDR memory.
q.enqueueMigrateMemObjects({rd_bmp_buf},0/* 0 means from host*/);
//set the kernel Arguments
krnl_lap_filter.setArg(0,rd_bmp_buf);
krnl_lap_filter.setArg(1,hw_lapd_buf);
krnl_lap_filter.setArg(2,bmpihr.biWidth);
krnl_lap_filter.setArg(3,bmpihr.biHeight);
// 時間計測
struct timeval start_time, end_time;
gettimeofday(&start_time, NULL);
//Launch the Kernel
q.enqueueTask(krnl_lap_filter);
// The result of the previous kernel execution will need to be retrieved in
// order to view the results. This call will transfer the data from FPGA to
// source_results vector
q.enqueueMigrateMemObjects({hw_lapd_buf},CL_MIGRATE_MEM_OBJECT_HOST);
q.finish();
// 時間計測
gettimeofday(&end_time, NULL);
if (end_time.tv_usec < start_time.tv_usec) {
printf("total time = %ld.%06ld sec\n", end_time.tv_sec - start_time.tv_sec - 1, 1000000 + end_time.tv_usec - start_time.tv_usec);
}
else {
printf("total time = %ld.%06ld sec\n", end_time.tv_sec - start_time.tv_sec, end_time.tv_usec - start_time.tv_usec);
}
laplacian_filter_soft(rd_bmp.data(), sw_lapd.data(), bmpihr.biWidth, bmpihr.biHeight); // ソフトウェアのラプラシアン・フィルタ
// ハードウェアとソフトウェアのラプラシアン・フィルタの値のチェック
for (y=0; y<bmpihr.biHeight; y++){
for (x=0; x<bmpihr.biWidth; x++){
if (hw_lapd[y*bmpihr.biWidth+x] != sw_lapd[y*bmpihr.biWidth+x]){
printf("ERROR HW and SW results mismatch x = %ld, y = %ld, HW = %d, SW = %d\n", x, y, hw_lapd[y*bmpihr.biWidth+x], sw_lapd[y*bmpihr.biWidth+x]);
//return(1);
}
}
}
printf("Success HW and SW results match\n");
// ハードウェアのラプラシアンフィルタの結果を temp_lap.bmp へ出力する
if ((fbmpw=fopen("temp_lap.bmp", "wb")) == NULL){
fprintf(stderr, "Can't open temp_lap.bmp by binary write mode\n");
exit(1);
}
// BMPファイルヘッダの書き込み
fwrite(&bmpfhr.bfType, sizeof(uint16_t), 1, fbmpw);
fwrite(&bmpfhr.bfSize, sizeof(uint32_t), 1, fbmpw);
fwrite(&bmpfhr.bfReserved1, sizeof(uint16_t), 1, fbmpw);
fwrite(&bmpfhr.bfReserved2, sizeof(uint16_t), 1, fbmpw);
fwrite(&bmpfhr.bfOffBits, sizeof(uint32_t), 1, fbmpw);
fwrite(&bmpihr, sizeof(BITMAPINFOHEADER), 1, fbmpw);
// RGB データの書き込み、逆順にする
for (y=0; y<bmpihr.biHeight; y++){
for (x=0; x<bmpihr.biWidth; x++){
blue = hw_lapd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] & 0xff;
green = (hw_lapd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x] >> 8) & 0xff;
red = (hw_lapd[((bmpihr.biHeight-1)-y)*bmpihr.biWidth+x]>>16) & 0xff;
fputc(blue, fbmpw);
fputc(green, fbmpw);
fputc(red, fbmpw);
}
}
fclose(fbmpw);
return(0);
}
void laplacian_filter_soft(int *cam_fb, int *lap_fb, long width, long height)
{
int **line_buf;
int *lap_buf;
int x, y, i;
int lap_fil_val;
int a, b;
int fl, sl, tl;
// line_buf の1次元目の配列をアロケートする
if ((line_buf =(int **)malloc(sizeof(int *) * 3)) == NULL){
fprintf(stderr, "Can't allocate line_buf[3][]\n");
exit(1);
}
// メモリをアロケートする
for (i=0; i<3; i++){
if ((line_buf[i]=(int *)malloc(sizeof(int) * width)) == NULL){
fprintf(stderr, "Can't allocate line_buf[%d]\n", i);
exit(1);
}
}
if ((lap_buf=(int *)malloc(sizeof(int) * (width))) == NULL){
fprintf(stderr, "Can't allocate lap_buf memory\n");
exit(1);
}
// RGB値をY(輝度成分)のみに変換し、ラプラシアンフィルタを掛けた。
for (y=0; y<height; y++){
for (x=0; x<width; x++){
if (y==0 || y==height-1){ // 縦の境界の時の値は0とする
lap_fil_val = 0;
}else if (x==0 || x==width-1){ // 横の境界の時も値は0とする
lap_fil_val = 0;
}else{
if (y == 1 && x == 1){ // 最初のラインの最初のピクセルでは2ライン分の画素を読み出す
for (a=0; a<2; a++){ // 2ライン分
for (b=0; b<width; b++){ // ライン
line_buf[a][b] = cam_fb[(a*width)+b];
line_buf[a][b] = conv_rgb2y_soft(line_buf[a][b]);
}
}
}
if (x == 1) { // ラインの最初なので、2つのピクセルを読み込む
for (b=0; b<2; b++){ // ライン
line_buf[(y+1)%3][b] = cam_fb[((y+1)*width)+b];
// (y+1)%3 は、使用済みのラインがに読み込む、y=2 の時 line[0], y=3の時 line[1], y=4の時 line[2]
line_buf[(y+1)%3][b] = conv_rgb2y_soft(line_buf[(y+1)%3][b]);
}
}
// 1つのピクセルを読み込みながらラプラシアン・フィルタを実行する
line_buf[(y+1)%3][x+1] = cam_fb[((y+1)*width)+(x+1)];
// (y+1)%3 は、使用済みのラインがに読み込む、y=2 の時 line[0], y=3の時 line[1], y=4の時 line[2]
line_buf[(y+1)%3][x+1] = conv_rgb2y_soft(line_buf[(y+1)%3][x+1]);
fl = (y-1)%3; // 最初のライン, y=1 012, y=2 120, y=3 201, y=4 012
sl = y%3; // 2番めのライン
tl = (y+1)%3; // 3番目のライン
lap_fil_val = laplacian_fil_soft(line_buf[fl][x-1], line_buf[fl][x], line_buf[fl][x+1], line_buf[sl][x-1], line_buf[sl][x], line_buf[sl][x+1], line_buf[tl][x-1], line_buf[tl][x], line_buf[tl][x+1]);
}
// ラプラシアンフィルタ・データの書き込み
lap_fb[(y*width)+x] = (lap_fil_val<<16)+(lap_fil_val<<8)+lap_fil_val ;
}
}
free(lap_buf);
for (i=0; i<3; i++)
free(line_buf[i]);
free(line_buf);
}
// RGBからYへの変換
// RGBのフォーマットは、{8'd0, R(8bits), G(8bits), B(8bits)}, 1pixel = 32bits
// 輝度信号Yのみに変換する。変換式は、Y = 0.299R + 0.587G + 0.114B
// "YUVフォーマット及び YUV<->RGB変換"を参考にした。http://vision.kuee.kyoto-u.ac.jp/~hiroaki/firewire/yuv.html
// 2013/09/27 : float を止めて、すべてint にした
int conv_rgb2y_soft(int rgb){
int r, g, b, y_f;
int y;
b = rgb & 0xff;
g = (rgb>>8) & 0xff;
r = (rgb>>16) & 0xff;
y_f = 77*r + 150*g + 29*b; //y_f = 0.299*r + 0.587*g + 0.114*b;の係数に256倍した
y = y_f >> 8; // 256で割る
return(y);
}
// ラプラシアンフィルタ
// x0y0 x1y0 x2y0 -1 -1 -1
// x0y1 x1y1 x2y1 -1 8 -1
// x0y2 x1y2 x2y2 -1 -1 -1
int laplacian_fil_soft(int x0y0, int x1y0, int x2y0, int x0y1, int x1y1, int x2y1, int x0y2, int x1y2, int x2y2)
{
int y;
y = -x0y0 -x1y0 -x2y0 -x0y1 +8*x1y1 -x2y1 -x0y2 -x1y2 -x2y2;
if (y<0)
y = 0;
else if (y>255)
y = 255;
return(y);
}
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